PIC16F88-I/SS Microchip Technology, PIC16F88-I/SS Datasheet - Page 257
![IC MCU FLASH 4KX14 EEPROM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F88-I/SS
Manufacturer Part Number
PIC16F88-I/SS
Description
IC MCU FLASH 4KX14 EEPROM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F87-IP.pdf
(228 pages)
5.PIC16F87-IP.pdf
(8 pages)
6.PIC16F87-IP.pdf
(4 pages)
7.PIC16F87-IP.pdf
(8 pages)
8.PIC16F88-ISO.pdf
(214 pages)
Specifications of PIC16F88-I/SS
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
7
Height
1.75 mm
Length
7.2 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F88-I/SS
Manufacturer:
U-BLOX
Quantity:
12 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F87-IP PDF datasheet #4
- PIC16F87-IP PDF datasheet #5
- PIC16F87-IP PDF datasheet #6
- PIC16F87-IP PDF datasheet #7
- PIC16F88-ISO PDF datasheet #8
- Current page: 257 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
The SSP consists of a transmit/receive Shift Register (SSPSR) and a Buffer register (SSPBUF).
The SSPSR shifts the data in and out of the device, MSB first. The SSPBUF holds the data that
was previously written to the SSPSR, until the received data is ready. Once the 8-bits of data
have been received, that information is moved to the SSPBUF register. Then the buffer full detect
bit, BF (SSPSTAT <0>), and interrupt flag bit, SSPIF, are set. This double buffering of the received
data (SSPBUF) allows the next byte to start reception before reading the data that was received.
Any write to the SSPBUF register during transmission/reception of data will be ignored, and the
write collision detect bit, WCOL (SSPCON<7>), will be set. User software must clear the WCOL
bit so that it can be determined if the following write(s) to the SSPBUF register completed suc-
cessfully. When the application software is expecting to receive valid data, the SSPBUF should
be read before the next byte of data to transfer is written to the SSPBUF. Buffer full bit, BF (SSP-
STAT<0>), indicates when SSPBUF has been loaded with the received data (transmission is
complete). When the SSPBUF is read, the BF bit is cleared. This data may be irrelevant if the SPI
is only a transmitter. Generally the SSP Interrupt is used to determine when the transmis-
sion/reception has completed. The SSPBUF can then be read (if data is meaningful) and/or the
SSPBUF (SSPSR) can be written. If the interrupt method is not going to be used, then software
polling can be done to ensure that a write collision does not occur.
ing of the SSPBUF (SSPSR) for data transmission. The shaded instruction is only required if the
received data is meaningful (some SPI applications are transmit only).
Example 16-1: Loading the SSPBUF (SSPSR) Register
The SSPSR is not directly readable or writable, and can only be accessed from addressing the
SSPBUF register. Additionally, the SSP status register (SSPSTAT) indicates the various status
conditions.
LOOP BTFSS SSPSTAT, BF
BCF
BSF
GOTO
BCF
MOVF
MOVWF RXDATA
MOVF
MOVWF SSPBUF
STATUS, RP1
STATUS, RP0
LOOP
STATUS, RP0
SSPBUF, W
TXDATA, W
;Specify Bank1
;
;Has data been received (transmit complete)?
;No
;Specify Bank0
;W reg = contents of SSPBUF
;Save in user RAM, if data is meaningful
;W reg = contents of TXDATA
;New data to xmit
Section 16. BSSP
Example 16-1
DS31016A-page 16-7
shows the load-
16
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