ATMEGA168-20MU Atmel, ATMEGA168-20MU Datasheet
ATMEGA168-20MU
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ATMEGA168-20MU Summary of contents
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... Oscillator) – Power-down Mode: 0.1 µA at 1.8V Note: 1. See “Data Retention” on page 7 ® ® AVR 8-Bit Microcontroller () 2 C compatible) for details. 8-bit Microcontroller with 4/8/16K Bytes In-System Programmable Flash ATmega48/V ATmega88/V ATmega168/V Summary Rev. 2545SS–AVR–07/10 ...
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Pin Configurations Figure 1-1. Pinout ATmega48/88/1682545SS TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 ...
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Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive ...
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Port D (PD7:0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D ...
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Overview The ATmega48/88/168 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48/88/168 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...
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... C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emu- lators, and Evaluation kits. 2.2 Comparison Between ATmega48, ATmega88, and ATmega168 The ATmega48, ATmega88 and ATmega168 differ only in memory sizes, boot loader support, and interrupt vector sizes. for the three devices. Table 2-1. ...
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... About 3.1 Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 3.2 Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ...
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Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...
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Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) OCR2B (0xB3) OCR2A (0xB2) ...
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Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...
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Address Name Bit 7 0x1B (0x3B) PCIFR – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...
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Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...
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... MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break Note: 1. These instructions are only available in ATmega168. 2545SS–AVR–07/10 Description Rd ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only ATmega48/88/168 Operation Flags ...
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... Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive).Also Halide free and fully Green. ...
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... Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive).Also Halide free and fully Green. ...
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... Wide, Plastic Dual Inline Package (PDIP) 2545SS–AVR–07/10 Ordering Code ATmega168V-10AI ATmega168V-10MI ATmega168V-10PI (2) ATmega168V-10AU (2) ATmega168V-10MU (2) ATmega168V-10PU ATmega168-20AI ATmega168-20MI ATmega168-20PI (2) ATmega168-20AU (2) ATmega168-20MU (2) ATmega168-20PU and Figure 26-2 on page 304. Package Type ATmega48/88/168 (1) Package Operational Range 32A 32M1-A 28P3 Industrial ° 32A (-40 ...
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Packaging Information 7.1 32A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...
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... Pin TOP VIEW 0.20 b 0.4 Ref BOTTOM VIEW (4x) The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com 2545SS–AVR–07/ TITLE 28M1, 28-pad 1.0 mm Body, Lead Pitch 0.45 mm, 2.4 x 2.4 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ...
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Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...
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A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 2545SS–AVR–07/10 ...
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Errata 8.1 Errata ATmega48 The revision letter in this section refers to the revision of the ATmega48 device. 8.1.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be ...
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Rev A • Part may hang in reset • Wrong values read after Erase Only operation • Watchdog Timer Interrupt disabled • Start-up time with Crystal Oscillator is higher than expected • High Power Consumption in Power-down with External ...
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Watchdog Timer Interrupt disabled If the watchdog timer interrupt flag is not cleared before a new timeout occurs, the watchdog will be disabled, and the interrupt flag will automatically be cleared. This is only applicable in interrupt only mode. ...
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Errata ATmega88 The revision letter in this section refers to the revision of the ATmega88 device. 8.2.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when ...
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... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 8.3 Errata ATmega168 The revision letter in this section refers to the revision of the ATmega168 device. 8.3.1 Rev C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1 ...
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A reset is applied window while the system clock prescaler value is updated by software. - Leaving SPI-programming mode generates an internal reset signal that can trigger this case. The two first cases can occur ...
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Two succeeding resets are applied where the second reset occurs in the 10 ns window before the device is out of the reset-state caused by the first reset reset is applied window while ...
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... Document updated according to Atmel standard. Updated “Errata” on page 357. Updated the last page with Atmel’s new addresses. Removed the heading “About”. The subsections of this sectionis now separate sec- tions, “Resources”, “Data Retention” and “About Code Examples” Updated “ ...
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Rev. 2545M-09/ 9.8 Rev. 2545L-08/ 9.9 Rev. 2545K-04/ 9.10 Rev. 2545J-12/ 9.11 Rev. 2545I-11/ 9.12 Rev. 2545H-10/ ...
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Rev. 2545G-06/ 10. 11. 12. 13. 14. 15. 16. 17 18. 19. 20. 9.14 Rev. 2545F-05/ 2545SS–AVR–07/10 Updated ...
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... ATmega88” on page ATmega48/88/168 updated. 357. 21. 32. 34. Table 28-6 on page 308, Table 28-2 on page 89. 290. 302. 349. and “Errata ATmega168” on page 306, Table 26-9 on page 35. 209. 215. 298. “ATmega168” on page 351. and “Errata ATmega168” on page 215. 304. 349. 360. ...
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Rev. 2545B-01/ 10. 11. 12. 2545SS–AVR–07/10 Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption Estimates in 35.“Features” on page Updated “Stack Pointer” on page 12 value. ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...