PIC18LF1320-I/SS Microchip Technology, PIC18LF1320-I/SS Datasheet - Page 269
![IC MCU FLASH 4KX16 EEPROM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC18LF1320-I/SS
Manufacturer Part Number
PIC18LF1320-I/SS
Description
IC MCU FLASH 4KX16 EEPROM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
7.PIC18F1220-EP.pdf
(310 pages)
Specifications of PIC18LF1320-I/SS
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1320-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F1220-ISO PDF datasheet #2
- PIC18F1220-ISO PDF datasheet #3
- PIC18F1220-ISO PDF datasheet #4
- PIC18F1220-ISO PDF datasheet #5
- PIC18F1220-ISO PDF datasheet #6
- PIC18F1220-EP PDF datasheet #7
- Current page: 269 of 310
- Download datasheet (6Mb)
FIGURE 22-14:
TABLE 22-14: A/D CONVERSION REQUIREMENTS
2004 Microchip Technology Inc.
130
131
132
135
136
Note 1:
Param
No.
A/D CLK
Note 1: If the A/D clock source is selected as RC, a time of T
A/D DATA
SAMPLE
2:
3:
4:
5:
ADRES
BSF ADCON0, GO
T
T
T
T
T
Symbol
ADIF
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
AD
CNV
ACQ
SWC
AMP
GO
Q4
ADRES register may be read on the following T
See Section 17.0 “10-Bit Analog-to-Digital Converter (A/D) Module” for minimum conditions when input
voltage has changed more than 1 LSb.
The time for the holding capacitor to acquire the “New” input voltage, when the voltage changes full scale after
the conversion (AV
On the next Q4 cycle of the device clock.
The time of the A/D clock period is dependent on the device frequency and the T
(1)
This allows the SLEEP instruction to be executed.
132
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 1)
Acquisition Time (Note 3)
Switching Time from Convert
Amplifier Settling Time (Note 2)
A/D CONVERSION TIMING
DD
(Note 2)
Characteristic
to AV
9
SS
, or AV
8
PIC18F1X20
PIC18LF1X20
PIC18F1X20
PIC18LF1X20
OLD_DATA
SS
7
to AV
Sample
CY
. . .
Sampling Stopped
DD
is added before the A/D clock starts.
). The source impedance (R
CY
. . .
131
130
cycle.
Min
1.6
3.0
2.0
3.0
11
15
10
—
1
2
(Note 4)
PIC18F1220/1320
20
20
Max
6.0
9.0
12
—
—
—
1
(5)
(5)
Units
T
AD
s
s
s
s
s
s
s
S
0
) on the input channels is 50 .
T
T
A/D RC mode
A/D RC mode
-40 C
0 C
This may be used if the
“new” input voltage has not
changed by more than 1 LSb
(i.e., 5 mV @ 5.12V) from the
last sampled voltage (as
stated on C
OSC
OSC
AD
based, V
based, V
clock divider.
NEW_DATA
DONE
Temp
Temp
Conditions
DS39605C-page 267
HOLD
T
CY
+125 C
REF
REF
+125 C
).
full range
3.0V
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