PIC18LF1320-I/SS Microchip Technology, PIC18LF1320-I/SS Datasheet - Page 223
![IC MCU FLASH 4KX16 EEPROM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC18LF1320-I/SS
Manufacturer Part Number
PIC18LF1320-I/SS
Description
IC MCU FLASH 4KX16 EEPROM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
7.PIC18F1220-EP.pdf
(310 pages)
Specifications of PIC18LF1320-I/SS
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1320-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F1220-ISO PDF datasheet #2
- PIC18F1220-ISO PDF datasheet #3
- PIC18F1220-ISO PDF datasheet #4
- PIC18F1220-ISO PDF datasheet #5
- PIC18F1220-ISO PDF datasheet #6
- PIC18F1220-EP PDF datasheet #7
- Current page: 223 of 310
- Download datasheet (6Mb)
RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
PC =
PC =
TOS =
Q1
No
Address (HERE)
Address (Jump)
Address (HERE + 2)
Read literal
Push PC to
operation
Relative Call
[ label ] RCALL
-1024
(PC) + 2
(PC) + 2 + 2n
None
Subroutine call with a jump up to 1K
from the current location. First,
return address (PC + 2) is pushed
onto the stack. Then, add the 2’s
complement number ‘2n’ to the PC.
Since the PC will have incremented
to fetch the next instruction, the new
address will be PC + 2 + 2n. This
instruction is a two-cycle instruction.
1
2
HERE
stack
1101
Q2
No
‘n’
n
RCALL
1nnn
1023
TOS,
operation
Process
Data
Q3
No
PC
Jump
n
nnnn
Write to PC
operation
Q4
No
nnnn
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
After Instruction
Decode
Registers =
Flags*
Q1
PIC18F1220/1320
=
Reset
[ label ]
None
Reset all registers and flags that
are affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset in software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
RESET
0000
operation
Q3
No
DS39605C-page 221
1111
operation
Q4
No
1111
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