PIC18F26J50-I/SS Microchip Technology, PIC18F26J50-I/SS Datasheet - Page 426

• Manufacturer Part Number: PIC18F26J50-I/SS
• Description: IC PIC MCU FLASH 64K 2V 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26J50-I/SS

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Interface: EUSART, I2C, SPI, USB
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F46J50 FAMILY
FIGURE 26-2:
DS39931C-page 426
OR
PIC18LFXXJ50 Devices (Regulator Disabled):
PIC18FXXJ50 Devices (Regulator Enabled):
2.5V
C
F
3.3V
2.5V
3.3V
CONNECTIONS FOR THE
ON-CHIP REGULATOR
V
V
V
V
V
V
V
V
V
DD
DDCORE
SS
DD
DDCORE
SS
DD
DDCORE
SS
PIC18LFXXJ50
PIC18FXXJ50
PIC18LFXXJ50
/V
/V
/V
CAP
CAP
CAP
26.3.2
When the on-chip regulator is enabled, PIC18F46J50
Family devices also have a simple brown-out capabil-
ity. If the voltage supplied to the regulator is inadequate
to maintain a minimum output level; the regulator Reset
circuitry will generate a Brown-out Reset (BOR). This
event is captured by the BOR flag bit (RCON<0>).
The operation of the BOR is described in more detail in
Section 4.4
Section 4.4.1 “Detecting BOR”. The brown-out voltage
levels are specific in Section 29.1 “DC Characteristics:
Supply Voltage PIC18F46J50 Family (Industrial)”.
26.3.3
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
exceed V
26.3.4
When enabled, the on-chip regulator always consumes
a small incremental amount of current over I
includes when the device is in Sleep mode, even
though the core digital logic does not require much
power. To provide additional savings in applications
where power resources are critical, the regulator can
be configured to automatically enter a lower quiescent
draw Standby mode whenever the device goes into
Sleep mode. This feature is controlled by the REGSLP
bit (WDTCON<7>, Register 26-11). If this bit is set
upon entry into Sleep mode, the regulator will transition
into a lower power state. In this state, the regulator still
provides a regulated output voltage necessary to
maintain SRAM state information, but consumes less
quiescent current.
Substantial Sleep mode power savings can be
obtained by setting the REGSLP bit, but device
wake-up time will increase in order to insure the
regulator has enough time to stabilize.
DD
ON-CHIP REGULATOR AND BOR
POWER-UP REQUIREMENTS
OPERATION IN SLEEP MODE
by 0.3 volts.
“Brown-out
© 2009 Microchip Technology Inc.
Reset
DDCORE
(BOR)”
should not
DD
. This
and