PIC24HJ12GP202-I/SO Microchip Technology, PIC24HJ12GP202-I/SO Datasheet - Page 36
![IC PIC MCU FLASH 4KX24 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC24HJ12GP202-I/SO
Manufacturer Part Number
PIC24HJ12GP202-I/SO
Description
IC PIC MCU FLASH 4KX24 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(242 pages)
2.PIC24HJ12GP201-ISO.pdf
(8 pages)
3.PIC24HJ12GP201-ISO.pdf
(84 pages)
4.PIC24HJ12GP201-ISO.pdf
(12 pages)
5.PIC24HJ12GP201-IP.pdf
(234 pages)
Specifications of PIC24HJ12GP202-I/SO
Program Memory Type
FLASH
Program Memory Size
12KB (4K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit or 10-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ12GP202-I/SO
Manufacturer:
MICROCHIP
Quantity:
187
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ12GP201-ISO PDF datasheet #2
- PIC24HJ12GP201-ISO PDF datasheet #3
- PIC24HJ12GP201-ISO PDF datasheet #4
- PIC24HJ12GP201-IP PDF datasheet #5
- Current page: 36 of 234
- Download datasheet (4Mb)
PIC24HJ12GP201/202
FIGURE 3-5:
DS70282B-page 34
Note 1: The Least Significant bit (LSb) of program space addresses is always fixed as ‘0’ to
Program Counter
Table Operations
Program Space Visibility
(Remapping)
2: Table operations are not required to be word-aligned. Table read operations are permitted
maintain word alignment of data in the program and data spaces.
in the configuration memory space.
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
(2)
(1)
User/Configuration
(1)
Space Select
1/0
0
0
TBLPAG
8 bits
Preliminary
PSVPAG
8 bits
Select
Program Counter
24 bits
1
23 bits
23 bits
15 bits
16 bits
EA
EA
© 2007 Microchip Technology Inc.
Byte Select
1/0
0
0
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