PIC24HJ12GP202-I/SS Microchip Technology, PIC24HJ12GP202-I/SS Datasheet - Page 50

• Manufacturer Part Number: PIC24HJ12GP202-I/SS
• Description: IC PIC MCU FLASH 4KX24 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ12GP202-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24HJ12GP201/202
5.2
A Power-on Reset (POR) circuit ensures the device is
reset from power-on. The POR circuit is active until
V
has elapsed. The delay T
device bias circuits become stable.
The device supply voltage characteristics must meet
the
requirements
Section 21.0 “Electrical Characteristics” for details.
The POR status (POR) bit in the Reset Control
(RCON<0>) register is set to indicate the Power-on
Reset.
5.3
The on-chip regulator has a Brown-out Reset (BOR)
circuit that resets the device when the V
(V
cuit keeps the device in Reset until V
FIGURE 5-3:
DS70282C-page 48
DD
DD
crosses the V
< V
SYSRST
SYSRST
SYSRST
specified
BOR
Power-on Reset (POR)
Brown-out Reset (BOR) and
Power-up timer (PWRT)
V
V
V
DD
DD
DD
) for proper device operation. The BOR cir-
to
starting
V
POR
DD
generate the POR. Refer to
dips before PWRT expires
BROWN-OUT SITUATIONS
threshold and the delay T
voltage
POR
ensures the internal
DD
and
crosses V
DD
rise
is too low
POR
BOR
rate
Preliminary
T
BOR
+ T
T
T
PWRT
BOR
BOR
threshold and the delay T
T
stable.
The BOR status (BOR) bit in the Reset Control
(RCON<1>) register is set to indicate the Brown-out
Reset.
The device will not run at full speed after a BOR as the
V
operation. The PWRT provides power-up time delay
(T
stabilized at the appropriate levels for full-speed
operation before the SYSRST is released.
The power-up timer delay (T
the
(FPWRT<2:0>)
(FPOR<2:0>) register, which provides eight settings
(from 0 ms to 128 ms). Refer to Section 18.0 “Special
Features” for further details.
Figure 5-3 shows the typical brown-out scenarios. The
reset delay (T
rises above the V
BOR
DD
+ T
PWRT
+ T
PWRT
should rise to acceptable levels for full-speed
PWRT
ensures the voltage regulator output becomes
Power-on
) to ensure that the system power supplies have
BOR
BOR
bits
+ T
Reset
PWRT
trip point
in
© 2008 Microchip Technology Inc.
BOR
) is initiated each time V
the
V
V
PWRT
V
Timer
BOR
BOR
has elapsed. The delay
BOR
POR
) is programmed by
Value
Configuration
Select
DD