PIC18F2221-I/SP Microchip Technology, PIC18F2221-I/SP Datasheet - Page 72
![IC PIC MCU FLASH 2KX16 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2221-I/SP
Manufacturer Part Number
PIC18F2221-I/SP
Description
IC PIC MCU FLASH 2KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18F2221-I/SP
Program Memory Type
FLASH
Program Memory Size
4KB (2K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2221-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18F2321-IML PDF datasheet #5
- Current page: 72 of 396
- Download datasheet (7Mb)
PIC18F4321 FAMILY
FIGURE 5-8:
DS39689E-page 70
EXAMPLE INSTRUCTION: ADDWF, f, d, a (Opcode: 0010 01da ffff ffff)
When ‘a’ = 0 and ‘f’ ≥ 60h:
The instruction executes in
Direct Forced mode. ‘f’ is inter-
preted as a location in the
Access RAM between 060h
and 0FFh. This is the same as
locations
(Bank 0) and F80h to FFFh
(Bank 15) of data memory.
Locations below 60h are not
available in this addressing
mode.
When ‘a’ = 0 and ‘f’ ≤ 5Fh:
The instruction executes in
Indexed Literal Offset mode. ‘f’
is interpreted as an offset to the
address value in FSR2. The
two are added together to
obtain the address of the target
register for the instruction. The
address can be anywhere in
the data memory space.
Note that in this mode, the
correct syntax is now:
ADDWF [k], d
where ‘k’ is the same as ‘f’.
When ‘a’ = 1 (all values of ‘f’):
The instruction executes in
Direct mode (also known as
Direct Long mode). ‘f’ is inter-
preted as a location in one of
the 16 banks of the data
memory space. The bank is
designated by the Bank Select
Register (BSR). The address
can be in any implemented
bank in the data memory
space.
060h
COMPARING ADDRESSING OPTIONS FOR BIT-ORIENTED AND
BYTE-ORIENTED INSTRUCTIONS (EXTENDED INSTRUCTION SET ENABLED)
to
07Fh
Preliminary
FFFh
FFFh
F00h
F80h
FFFh
000h
060h
080h
100h
000h
080h
100h
F00h
F80h
000h
080h
100h
F00h
F80h
Data Memory
Data Memory
Data Memory
Bank 15
Bank 15
Bank 15
Bank 14
Bank 14
Bank 14
Bank 0
through
Bank 0
through
Bank 0
through
Bank 1
Bank 1
Bank 1
SFRs
SFRs
SFRs
001001da
00000000
001001da
BSR
Access RAM
© 2007 Microchip Technology Inc.
FSR2H
ffffffff
ffffffff
FSR2L
00h
60h
80h
FFh
Valid range
for ‘f’
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