ATMEGA8515L-8AU Atmel, ATMEGA8515L-8AU Datasheet - Page 182

IC AVR MCU 8K 8MHZ 3V 44TQFP

ATMEGA8515L-8AU

Manufacturer Part Number
ATMEGA8515L-8AU
Description
IC AVR MCU 8K 8MHZ 3V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8515L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Parallel Programming
Parameters, Pin
Mapping, and
Commands
Signal Names
182
ATmega8515(L)
This section describes how to parallel program and verify Flash Program memory,
EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega8515. Pulses
are assumed to be at least 250 ns unless otherwise noted.
In this section, some pins of the ATmega8515 are referenced by signal names describ-
ing their functionality during parallel programming, see Figure 75 and Table 85. Pins not
described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-
tive pulse. The bit coding is shown in Table 87.
When pulsing WR or OE, the command loaded determines the action executed. The dif-
ferent Commands are shown in Table 88.
Figure 75. Parallel Programming
Table 85. Pin Name Mapping
Signal Name in Programming Mode
RDY/BSY
PAGEL
DATA
BS1
XA0
XA1
BS2
WR
OE
RDY/BSY
PAGEL
+12 V
BS2
BS1
XA0
XA1
WR
OE
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
PA0
Pin Name
PB7-0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PA0
PB7 - PB0
VCC
I/O
I/O
O
I
I
I
I
I
I
I
XTAL Action Bit 0
XTAL Action Bit 1
Function
0: Device is busy programming, 1:
Device is ready for new command
Output Enable (Active low)
Write Pulse (Active low)
Byte Select 1 (“0” selects low
byte, “1” selects high byte)
Program memory and EEPROM
data Page Load
Byte Select 2 (“0” selects low
byte, “1” selects 2’nd high byte)
Bi-directional Data bus (Output
when OE is low)
+5V
DATA
2512K–AVR–01/10

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