PIC24FJ32GA002-I/SS Microchip Technology, PIC24FJ32GA002-I/SS Datasheet - Page 20

• Manufacturer Part Number: PIC24FJ32GA002-I/SS
• Description: IC PIC MCU FLASH 32K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ32GA002-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 32KB (11K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GA004 FAMILY
APPENDIX A:
Rev A Document (5/2009)
Initial release of this document; issued for silicon
revision
B5. Incorporates the following current and historical
silicon issues from revision A3 and B4:
• 1 (JTAG)
• 2 (Low-Voltage Detect)
• 3-6 (Core)
• 7-9 (A/D)
• 10 (I
• 11-16 (UART)
• 17 (Output Compare)
• 18-20 (SPI)
• 21-22 (I/O Ports)
• 23 (JTAG)
• 24 (RTCC)
• 25-26 (I
• 27 (UART)
• 28 (I/O – Peripheral Pin Select)
• 29 (UART – UERIF Interrupt)
• 30 (UART – FIFO Error Flags)
• 31 (Core – BOR)
• 32 (Core – Instruction Set)
• 33 (Memory – Program Space Visibility)
• 34 (RTCC)
• 35 (SPI – Master Mode)
• 36 (I
• 37 (I
• 38 (I
• 39 (UART)
• 40 (Oscillator – SOSC)
• 41 (Voltage Regulator)
• 42 (Core – Code Protection)
• 43 (SPI)
• 44 (Core)
For data sheet clarifications:
Includes Data Sheet Clarifications 1 (Electrical
Characteristics), 2 (10-Bit High-Speed A/D Converter),
3 (I/O Ports), 4 (Oscillator Configuration), 5-6 (Special
Features) and 7-9 (Electrical Characteristics).
This document replaces these errata documents:
• “PIC24FJ64GA004 Family Revision A3 Silicon
• “PIC24FJ64GA004 Family Revision B4 Silicon
• “PIC24FJ64GA004 Family Data Sheet Errata”
DS80470E-page 20
Errata” (DS80316)
Errata” (DS80384)
(DS80333)
2
2
2
2
C – I2C1 and SDA Line State)
C – Master Mode)
C – Slave Mode)
C)
2
C)
DOCUMENT
REVISION HISTORY
Rev B Document (7/2009)
Amended existing silicon revision A3 as joint revision
A3/A4.
Added silicon issue 45 (UART) to silicon revision A3/A4.
Added silicon revision B5; includes existing issues
16 (UART), 29 (UART – UERIF Interrupt), 30 (UART –
FIFO Error Flags), 30 (Core), 33 (Memory – Program
Space Visibility), 34 (RTCC), 36 (I
(I
No new silicon issues added for this revision.
Revised issue 25 (I
entiating erroneous bit behavior from misinterpretation
of the bit state.
Added data sheet clarification 10 (I
Rev C Document (2/2010)
Removed existing issue 44 (Core) entirely; issue 45
(UART – IrDA) now renumbered as issue 44.
Added new issues 45 (Core), 46 and 47 (SPI – Master
Mode), 48 (SPI – Framed SPI Modes), 49 (Core – Data
SRAM) and 50 (I/O – PORTA and PORTB) to various
existing silicon revisions.
Added silicon revision B8; includes newly added and
existing issues 16 (UART), 29 (UART – UERIF
Interrupt), 30 (UART – FIFO Error Flags), 31 (Core –
BOR), 33 (Memory – Program Space Visibility),
34 (RTCC), 36 (I
Mode), 39 (UART), 43 (SPI), 45 (Core), 46 through
47 (SPI – Master Mode), 48 (SPI – Framed SPI
Modes) and 50 (I/O – PORTA and PORTB).
Removed all data sheet clarifications as they are
addressed in the new revision of the data sheet.
Amended revision history to include the addition of silicon
revision B5 to this document.
Rev D Document (3/2010)
Updated silicon issue 50 (I/O – PORTA and PORTB) by
removing PORTB issues not relevant to this device
family.
Added data sheet clarification 1 (Electrical Specifica-
tions – DC Characteristics) to revision D of the data
sheet.
Rev E Document (9/2010)
Added silicon issue 51 (A/D Converter), added data
sheet clarification issues 1 (Guidelines For Getting
Started with 16-Bit Microcontrollers) and 2 (
Characteristics).
Table
2
C – Slave Mode), 39 (UART), 43 (SPI) and 44 (Core).
27-3, a newer version, has been added.
2
C – Master Mode), 37 (I
2
C) with additional information, differ-
Removed Table 27-10 because
 2010 Microchip Technology Inc.
2
C – Master Mode), 37
2
C).
2
C – Slave
Electrical