PIC16F639-I/SS Microchip Technology, PIC16F639-I/SS Datasheet - Page 4

• Manufacturer Part Number: PIC16F639-I/SS
• Description: IC MCU FLASH 2KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F639-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162066 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F636/639
4. Module: Data EEPROM Memory
DS80204H-page 4
The EEIF flag may be cleared inadvertently when
performing operations on the PIR1 register
simultaneously with the completion of an EEPROM
write. This condition occurs when the EEPROM
write timer completes at the same moment that the
PIR1 register operation is executed. Register
operations are those that have the PIR1 register as
the destination and include, but are not limited to,
BSF, BCF, ANDWF, IORWF and XORWF.
Work around
1. Avoid operations on the PIR1 register when
2. Poll the WR bit (EECON1<1>) to determine
3. Use a timer interrupt to catch any instances
4. If periodic interrupts are occurring in addition to
Affected Silicon Revisions
Fix
Rev. B Silicon and later revisions.
A1
X
writing to the EEPROM memory.
when the write is complete.
when the EEIF flag is inadvertently cleared.
The timer interrupt should be set longer than
8ms. If EEIF fails, then the timer interrupt
occurs as a default time out. The WR and
WRERR flags are checked as part of the timer
Interrupt
EEPROM write success.
the EEIF interrupts, then use a secondary flag
to sense write completion. The secondary flag
is set whenever EEPROM writes are active. An
EEPROM write completion is indicated when
the secondary flag is set and the WR flag is
clear.
B3
Service
B4
Routine
to
verify
the
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