PIC18F65J11-I/PT Microchip Technology, PIC18F65J11-I/PT Datasheet - Page 78

• Manufacturer Part Number: PIC18F65J11-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J11-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 2048Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 52
• Interface Type: I2C/SPI/USART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J11 FAMILY
TABLE 6-4:
DS39774D-page 78
TMR0H
TMR0L
T0CON
OSCCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CVRCON
CMCON
TMR3H
TMR3L
T3CON
PSPCON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
EECON2
EECON1
Legend:
Note 1:
File Name
2:
3:
4:
5:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
These registers and/or bits are available only on 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset states shown are
for 80-pin devices.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking” for details.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See Section 3.4.3 “PLL Frequency
Multiplier” for details.
RA6/RA7 and their associated latch and direction bits are configured as port pins only when the internal oscillator is selected as the default
clock source (FOSC2 Configuration bit = 0); otherwise, they are disabled and these bits read as ‘0’.
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP Receive Buffer/Transmit Register
MSSP Address Register (I
A/D Result Register High Byte
A/D Result Register Low Byte
Timer3 Register High Byte
Timer3 Register Low Byte
EUSART Baud Rate Generator Register
EUSART Receive Register
EUSART Transmit Register
EEPROM Control Register 2 (not a physical register)
TMR0ON
REGSLP
ADCAL
CVREN
C2OUT
WCOL
IDLEN
GCEN
GCEN
ADFM
CSRC
SPEN
RD16
RD16
IPEN
Bit 7
SMP
IBF
—
—
—
PIC18F85J11 FAMILY REGISTER FILE SUMMARY (CONTINUED)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
ACKSTAT
ACKSTAT
T3CCP2
CVROE
T1RUN
SSPOV
C1OUT
T08BIT
IRCF2
Bit 6
CKE
OBF
RX9
TX9
—
—
—
—
—
—
2
C™ Slave mode). MSSP Baud Rate Reload Register (I
ADMSK5
T1CKPS1
T3CKPS1
SSPEN
ACKDT
VCFG1
ACQT2
C2INV
IRCF1
CVRR
SREN
T0CS
CHS3
TXEN
IBOV
Bit 5
CM
D/A
—
—
(3)
ADMSK4
PSPMODE
T1CKPS0
T3CKPS0
ACKEN
CVRSS
VCFG0
ACQT1
IRCF0
C1INV
SYNC
CREN
CHS2
FREE
T0SE
Bit 4
CKP
—
RI
P
(3)
ADMSK3
T1OSCEN
T3CCP1
WRERR
SSPM3
SENDB
ADDEN
PCFG3
ACQT0
OSTS
RCEN
CHS1
CVR3
Bit 3
PSA
CIS
TO
—
—
S
(3)
ADMSK2
TMR2ON
T1SYNC
T3SYNC
SSPM2
PCFG2
ADCS2
T0PS2
WREN
BRGH
CHS0
CVR2
FERR
IOFS
Bit 2
R/W
PEN
CM2
PD
—
—
(3)
2
C™ Slave mode. See Section 17.4.3.2 “Address
2
C Master mode).
ADMSK1
GO/DONE
T2CKPS1
TMR1CS
TMR3CS
SSPM1
PCFG1
ADCS1
T0PS1
RSEN
TRMT
OERR
SCS1
CVR1
Bit 1
POR
CM1
WR
UA
—
—
(3)
 2010 Microchip Technology Inc.
SWDTEN
T2CKPS0
TMR1ON
TMR3ON
SSPM0
PCFG0
ADCS0
T0PS0
ADON
SCS0
CVR0
TX9D
RX9D
Bit 0
BOR
SEN
SEN
CM0
BF
—
—
0000 0000
xxxx xxxx
1111 1111
0100 q000
0--- ---0
0-11 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0-00 0000
--00 0000
0-00 0000
0000 0000
0000 0111
xxxx xxxx
xxxx xxxx
0000 0000
0000 ----
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
---- ----
---0 x00-
POR, BOR
Value on
on page
58, 187,
58, 180,
58, 181,
58, 191,
Details
58, 155
58, 155
58, 153
58, 287
58, 161
58, 161
58, 157
58, 164
58, 164
58, 163
58, 222
59, 267
59, 267
59, 259
59, 260
59, 261
59, 275
59, 269
59, 167
59, 167
59, 165
59, 165
59, 228
59, 236
59, 234
59, 224
59, 225
36, 58
52, 58
59, 90
59, 91
222
189
190
192