PIC18F25J50-I/SO Microchip Technology, PIC18F25J50-I/SO Datasheet - Page 322
![IC PIC MCU FLASH 32K 2V 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F25J50-I/SO
Manufacturer Part Number
PIC18F25J50-I/SO
Description
IC PIC MCU FLASH 32K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
4.PIC18F24J50-ISS.pdf
(18 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F25J50-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F25J50-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 001
- PIC18LF24J10-ISS PDF datasheet
- PIC18LF24J50-ISS PDF datasheet #2
- PIC18LF24J50-ISS PDF datasheet #3
- PIC18F24J50-ISS PDF datasheet #4
- PIC18F26K20-ISO PDF datasheet #5
- Current page: 322 of 554
- Download datasheet (9Mb)
PIC18F46J50 FAMILY
EXAMPLE 19-1:
TABLE 19-2:
DS39931C-page 322
TXSTAx
RCSTAx
BAUDCONx ABDOVF
SPBRGHx EUSARTx Baud Rate Generator Register High Byte
SPBRGx
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
For a device with Fosc of 16 MHz, desired baud rate of 9600, Asynchronous mode, and
8-bit BRG:
Desired Baud Rate = Fosc/(64 ([SPBRGHx:SPBRGx] + 1))
Solving for SPBRGHx:SPBRGx:
Calculated Baud Rate=16000000/(64 (25 + 1))
Error =
Name
X
=
=
=
=
=
EUSARTx Baud Rate Generator Register Low Byte
((Fosc/Desired Baud Rate)/64) – 1
((16000000/9600)/64) – 1
[25.042] = 25
9615
(Calculated Baud Rate – Desired Baud Rate)/Desired Baud Rate
(9615 – 9600)/9600 = 0.16%
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
CALCULATING BAUD RATE ERROR
RCIDL
Bit 6
RX9
TX9
RXDTP
TXEN
SREN
Bit 5
TXCKP
SYNC
CREN
Bit 4
SENDB
ADDEN
BRG16
Bit 3
BRGH
FERR
Bit 2
—
OERR
TRMT
WUE
Bit 1
© 2009 Microchip Technology Inc.
ABDEN
RX9D
TX9D
Bit 0
Reset Values
on Page:
65
65
66
66
65
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