PIC18F25J50-I/SO Microchip Technology, PIC18F25J50-I/SO Datasheet - Page 260
![IC PIC MCU FLASH 32K 2V 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F25J50-I/SO
Manufacturer Part Number
PIC18F25J50-I/SO
Description
IC PIC MCU FLASH 32K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
4.PIC18F24J50-ISS.pdf
(18 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F25J50-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F25J50-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 001
- PIC18LF24J10-ISS PDF datasheet
- PIC18LF24J50-ISS PDF datasheet #2
- PIC18LF24J50-ISS PDF datasheet #3
- PIC18F24J50-ISS PDF datasheet #4
- PIC18F26K20-ISO PDF datasheet #5
- Current page: 260 of 554
- Download datasheet (9Mb)
PIC18F46J50 FAMILY
FIGURE 17-18:
FIGURE 17-19:
FIGURE 17-20:
DS39931C-page 260
Note 1: Port outputs are configured as displayed when
P1<D:A>
PORT Data
PORT Data
PORT Data
PORT Data
STRn
P1<D:A>
PxA Signal
PWM
CCPxM1
CCPxM0
CCPxM1
CCPxM0
2: Single PWM output requires setting at least
STRn
PWM
STRA
STRB
STRC
STRD
the CCPxCON register bits, PxM<1:0> = 00
and CCPxM<3:2> = 11.
one of the STRx bits.
PORT Data
SIMPLIFIED STEERING
BLOCK DIAGRAM
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION (STRSYNC = 1)
1
0
1
0
1
0
1
0
PORT Data
PWM Period
TRIS
TRIS
TRIS
TRIS
RPn pin
RPn pin
RPn pin
RPn pin
P1n = PWM
17.5.7.1
The STRSYNC bit of the PSTRxCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRxCON register. In this case, the out-
put signal at the Px<D:A> pins may be an incomplete
PWM waveform. This operation is useful when the user
firmware needs to immediately remove a PWM signal
from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
Figures 17-19 and 17-20 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
Steering Synchronization
PORT Data
© 2009 Microchip Technology Inc.
PORT Data
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