ATMEGA48P-20AU Atmel, ATMEGA48P-20AU Datasheet - Page 275
ATMEGA48P-20AU
Manufacturer Part Number
ATMEGA48P-20AU
Description
MCU AVR 4K ISP FLSH 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48P-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA48P-20AU
Manufacturer:
TI
Quantity:
101
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26. Boot Loader Support – Read-While-Write Self-Programming, ATmega88P and
26.1
26.2
26.3
26.3.1
26.3.2
8025L–AVR–7/10
ATmega168P
Features
Overview
Application and Boot Loader Flash Sections
Application Section
BLS – Boot Loader Section
•
•
•
•
•
•
•
Note:
In ATmega88P and ATmega168P, the Boot Loader Support provides a real Read-While-Write
Self-Programming mechanism for downloading and uploading program code by the MCU itself.
This feature allows flexible application software updates controlled by the MCU using a Flash-
resident Boot Loader program. The Boot Loader program can use any available data interface
and associated protocol to read code and write (program) that code into the Flash memory, or
read the code from the program memory. The program code within the Boot Loader section has
the capability to write into the entire Flash, including the Boot Loader memory. The Boot Loader
can thus even modify itself, and it can also erase itself from the code if the feature is not needed
anymore. The size of the Boot Loader memory is configurable with fuses and the Boot Loader
has two separate sets of Boot Lock bits which can be set independently. This gives the user a
unique flexibility to select different levels of protection.
The Flash memory is organized in two main sections, the Application section and the Boot
Loader section (see
BOOTSZ Fuses as shown in
have different level of protection since they have different sets of Lock bits.
The Application section is the section of the Flash that is used for storing the application code.
The protection level for the Application section can be selected by the application Boot Lock bits
(Boot Lock bits 0), see
Boot Loader code since the SPM instruction is disabled when executed from the Application
section.
While the Application section is used for storing the application code, the The Boot Loader soft-
ware must be located in the BLS since the SPM instruction can initiate a programming when
executing from the BLS only. The SPM instruction can access the entire Flash, including the
BLS itself. The protection level for the Boot Loader section can be selected by the Boot Loader
Lock bits (Boot Lock bits 1), see
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
1. A page is a section in the Flash consisting of several bytes (see
during programming. The page organization does not affect normal operation.
(1)
Size
Figure
Table 26-2 on page
Table 26-7 on page 287
26-2). The size of the different sections is configured by the
Table 26-3 on page
279. The Application section can never store any
279.
ATmega48P/88P/168P
and
Figure
26-2. These two sections can
Table 27-9 on page
295) used
275
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