ATTINY84-20PU Atmel, ATTINY84-20PU Datasheet - Page 4
ATTINY84-20PU
Manufacturer Part Number
ATTINY84-20PU
Description
IC MCU AVR 8K FLASH 20MHZ 14-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY84-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-DIP (0.300", 7.62mm)
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR Tiny
No. Of I/o's
12
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Package
14PDIP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY84-20PU
Manufacturer:
XILINX
Quantity:
25
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2. Overview
4
ATtiny24/44/84
ATtiny24/44/84 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny24/44/84
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize
power consumption versus processing speed.
Figure 2-1.
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
GND
VCC
Block Diagram
PROGRAMMING
INSTRUCTION
PROGRAM
PROGRAM
REGISTER
INSTRUCTION
COUNTER
CONTROL
DECODER
FLASH
LINES
LOGIC
DATA REGISTER
PORT A
PORT A DRIVERS
ISP INTERFACE
PA7-PA0
REGISTERS
POINTER
REGISTER
PURPOSE
GENERAL
STATUS
STACK
SRAM
ALU
X
Y
Z
REG.PORT A
DATA DIR.
8-BIT DATABUS
ADC
MCU CONTROL
MCU STATUS
OSCILLATOR
WATCHDOG
INTERRUPT
REGISTER
REGISTER
INTERNAL
COUNTER0
COUNTER1
EEPROM
TIMER/
TIMER/
DATA REGISTER
TIMER
UNIT
PORT B
PORT B DRIVERS
PB3-PB0
OSCILLATORS
CALIBRATED
OSCILLATOR
TIMING AND
REG.PORT B
INTERNAL
CONTROL
DATA DIR.
8006K–AVR–10/10
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