PIC12C672-10I/P Microchip Technology, PIC12C672-10I/P Datasheet - Page 175
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PIC12C672-10I/P
Manufacturer Part Number
PIC12C672-10I/P
Description
IC MCU OTP 2KX14 A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-10I/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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- Download datasheet (3Mb)
11.6
1997 Microchip Technology Inc.
T0CKI pin
CLKOUT (=Fosc/4)
WDT Enable bit
Watchdog
Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>).
Timer
TMR0 Prescaler
T0SE
An 8-bit counter is available as a prescaler for the Timer0 module, or as a postscaler for the
Watchdog Timer
the Timer0 description. Thus, a prescaler assignment for the Timer0 module means that there is
no postscaler for the Watchdog Timer, and vice-versa.
The PSA and PS2:PS0 bits (OPTION<3:0>) determine the prescaler assignment and prescale
ratio.
When assigned to the Timer0 module, all instructions writing to the TMR0 register (e.g.,
CLRF TMR0, MOVWF TMR0, BSF TMR0,x....etc.) will clear the prescaler. When assigned to WDT,
a CLRWDT instruction will clear the prescaler along with the Watchdog Timer. The prescaler is not
readable or writable.
Figure 11-6: Block Diagram of the Timer0/WDT Prescaler
Note:
0
1
PSA
M
U
X
There is only one prescaler available which is mutually exclusively shared between
the Timer0 module and the Watchdog Timer.
0
1
T0CS
(Figure
M
U
X
0
8-bit Prescaler
8 - to - 1MUX
11-6). For simplicity, this counter is being referred to as “prescaler” in
Time-out
8
M U X
WDT
1
0
1
PSA
M
U
X
PSA
Section 11. Timer0
PS2:PS0
Cycles
SYNC
2
TMR0 reg
Data Bus
8
DS31011A-page 11-7
Set T0IF flag bit
on Overflow
11
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