PIC18F45J10-I/P Microchip Technology, PIC18F45J10-I/P Datasheet - Page 187

• Manufacturer Part Number: PIC18F45J10-I/P
• Description: IC PIC MCU FLASH 16KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F45J10-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: MSSP/SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163022, DM183040
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180013 - MODULE PLUG-IN 18F45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 15-4:
© 2007 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TRISC
TRISD
SSP1BUF
SSP1ADD
SSP1CON1
SSP1CON2
SSP1STAT
SSP2BUF
SSP2ADD
SSP2CON1
SSP2CON2
SSP2STAT
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
Note 1:
Name
(1)
These registers and/or bits are not implemented on 28-pin devices and should be read as ‘0’.
MSSP1 Baud Rate Reload Register (I
MSSP2 Baud Rate Reload Register (I
MSSP1 Receive Buffer/Transmit Register
MSSP1 Address Register (I
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I
GIE/GIEH PEIE/GIEL TMR0IE
PSPIE
PSPIP
PSPIF
OSCFIF
OSCFIE
OSCFIP
TRISC7
TRISD7
SSP2IF
SSP2IE
SSP2IP
WCOL
WCOL
GCEN
GCEN
SMP
SMP
Bit 7
REGISTERS ASSOCIATED WITH I
(1)
(1)
(1)
ACKSTAT
ACKSTAT
TRISC6
TRISD6
BCL2IE
BCL2IP
SSPOV
SSPOV
BCL2IF
CMIF
CMIE
CMIP
ADIE
ADIP
Bit 6
ADIF
CKE
CKE
TRISC5
TRISD5
SSPEN
ACKDT
SSPEN
ACKDT
RCIF
RCIE
RCIP
Bit 5
D/A
D/A
2
2
—
—
—
—
—
—
C™ Slave mode).
C Slave mode).
TRISC4
TRISD4
ACKEN
ACKEN
Preliminary
INT0IE
2
2
Bit 4
TXIF
TXIE
TXIP
CKP
CKP
C Master mode).
C Master mode).
—
—
—
—
—
—
P
P
2
C™ OPERATION
PIC18F45J10 FAMILY
SSP1IF
SSP1IE
SSP1IP
BCL1IE
BCL1IP
TRISC3
TRISD3
BCL1IF
SSPM3
SSPM3
RCEN
RCEN
RBIE
Bit 3
—
—
—
S
S
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISC2
TRISD2
SSPM2
SSPM2
Bit 2
PEN
R/W
PEN
R/W
—
—
—
—
—
—
TMR2IE
TMR2IP
TMR2IF
TRISC1
TRISD1
SSPM1
SSPM1
INT0IF
RSEN
RSEN
Bit 1
UA
UA
—
—
—
—
—
—
2
TMR1IF
TMR1IE
TMR1IP
CCP2IE
CCP2IP
CCP2IF
TRISC0
TRISD0
C™ mode.
SSPM0
SSPM0
RBIF
DS39682C-page 185
Bit 0
SEN
SEN
BF
BF
—
—
—
on Page
Values
Reset
43
45
45
45
45
45
45
45
45
45
46
46
44
44
44
44
46
46
46
46
44
46