PIC16F887-I/P Microchip Technology, PIC16F887-I/P Datasheet - Page 188
![IC PIC MCU FLASH 8KX14 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC16F887-I/P
Manufacturer Part Number
PIC16F887-I/P
Description
IC PIC MCU FLASH 8KX14 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F887-I/P
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Mfg Application Notes
Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53273-916
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F887-I/P
Manufacturer:
MICROCHIP
Quantity:
16
Part Number:
PIC16F887-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC16F887-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16F882/883/884/886/887
13.3.4
In Slave mode, the data is transmitted and received as
the external clock pulses appear on SCK. When the
last bit is latched, the SSPIF interrupt flag bit of the
PIR1 register is set.
While in Slave mode, the external clock is supplied by
the external clock source on the SCK pin. This external
clock must meet the minimum high and low times, as
specified in the electrical specifications.
While in Sleep mode, the slave can transmit/receive
data. When a byte is received, the device will wake-up
from Sleep.
13.3.5
The SS pin allows a Synchronous Slave mode. The
SPI must be in Slave mode with SS pin control
enabled (SSPCON<3:0> = 04h). The pin must not
be driven low for the SS pin to function as an input.
The Data Latch must be high. When the SS pin is
low, transmission and reception are enabled and
the SDO pin is driven. When the SS pin goes high,
FIGURE 13-3:
DS41291F-page 186
SS
SCK
(CKP = 0
CKE = 0)
SCK
(CKP = 1
CKE = 0)
Write to
SSPBUF
SDO
SDI
(SMP = 0)
Input
Sample
(SMP = 0)
SSPIF
SSPSR to
SSPBUF
SLAVE MODE
SLAVE SELECT
SYNCHRONIZATION
SLAVE SYNCHRONIZATION WAVEFORM
bit 7
bit 7
bit 6
the SDO pin is no longer driven, even if in the mid-
dle of a transmitted byte, and becomes a floating
output. External pull-up/pull-down resistors may be
desirable, depending on the application.
When the SPI module resets, the bit counter is forced
to ‘0’. This can be done by either forcing the SS pin to
a high level, or clearing the SSPEN bit.
To emulate two-wire communication, the SDO pin can
be connected to the SDI pin. When the SPI needs to
operate as a receiver, the SDO pin can be configured
as an input. This disables transmissions from the SDO.
The SDI can always be left as an input (SDI function),
since it cannot create a bus conflict.
Note 1: When the SPI is in Slave mode with SS
2: If the SPI is used in Slave mode with CKE
pin control enabled (SSPCON<3:0> =
0100), the SPI module will reset if the SS
pin is set to V
set (SSPSTAT register), then the SS pin
control must be enabled.
bit 7
bit 7
© 2009 Microchip Technology Inc.
DD
.
Next Q4 Cycle
after Q2↓
bit 0
bit 0