PIC12C672-04/SM Microchip Technology, PIC12C672-04/SM Datasheet - Page 593
PIC12C672-04/SM
Manufacturer Part Number
PIC12C672-04/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-04/SM
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12C672-04/SM
Manufacturer:
MIC
Quantity:
141
Part Number:
PIC12C672-04/SM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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30.19
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Param.
1997 Microchip Technology Inc.
No.
71A
72A
73A
70
71
72
73
74
75
76
78
79
80
SCK
(CKP = 0)
(CKP = 1)
SDO
SDI
SS
SCK
† Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
Refer to
tested.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
B
Symbol
Example SSP and Master SSP SPI Mode Timing Waveforms and Requirements
2
B
Figure 30-1
Figure 30-9:
Table 30-21:
Characteristic
SS to SCK or SCK input
SCK input high time
(slave mode)
SCK input low time
(slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time PIC16CXXX
SDO data output fall time
SCK output rise time
(master mode)
SCK output fall time (master mode)
SDO data output valid
after SCK edge
Section 30. Electrical Specifications
70
for load conditions.
80
71
73
MSb IN
Example SPI Mode Requirements (Master Mode, CKE = 0)
MSb
Example SPI Master Mode Timing (CKE = 0)
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
BIT6 - - - - - -1
BIT6 - - - -1
1.25T
1.25T
1.5T
78
79
Min
T
100
100
CY
40
40
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
+ 30
+ 30
LSb
79
78
LSb IN
Typ† Max Units
—
—
—
—
—
—
—
—
10
20
10
10
20
10
—
—
100
—
—
—
—
—
—
—
—
25
45
25
25
45
25
50
DS31030A-page 30-23
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
Note 1
Note 1
Conditions
30
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