PIC16F1938-I/ML Microchip Technology, PIC16F1938-I/ML Datasheet - Page 24

• Manufacturer Part Number: PIC16F1938-I/ML
• Description: IC MCU 8BIT FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/ML

• Core Size: 8-Bit
• Program Memory Size: 28KB (16K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1024Byte
• Cpu Speed: 32MHz
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F193X/LF193X
FIGURE 2-1:
DS41364D-page 24
OSC2/CLKOUT
OSC1/CLKIN
15
Oscillator
Oscillator
Oscillator
Program
Program
Program
Internal
Internal
Internal
15
Block
Block
Block
Bus
Bus
Bus
CORE BLOCK DIAGRAM
15
Instruction Reg
Instruction reg
Instruction reg
Decode and
Configuration
Configuration
Configuration
Generation
Generation
Generation
Instruction
Instruction
Instruction
Decode &
Decode &
Program
Memory
14
14
14
Control
Control
Control
Timing
Timing
Timing
Flash
8
8
8
Direct Addr 7
Direct Addr 7
Direct Addr 7
15
Preliminary
Start-up Timer
Program Memory
Program Counter
Program Counter
Program Counter
V
V
V
16-Level Stack
Brown-out
8 Level Stack
8 Level Stack
Watchdog
Power-up
Power-on
Oscillator
DD
DD
DD
Read (PMR)
Reset
Reset
Timer
Timer
(13-bit)
(13-bit)
(15-bit)
V
V
V
SS
SS
SS
FSR1 Reg
FSR reg
FSR reg
8
8
8
3
3
3
12
Data Bus
Data Bus
Data Bus
Addr MUX
Addr MUX
Addr MUX
ALU
ALU
ALU
W reg
RAM
Indirect
STATUS Reg
STATUS reg
STATUS reg
Addr
 2009 Microchip Technology Inc.
FSR reg
FSR reg
FSR0 Reg
9
MUX
MUX
MUX
RAM Addr
12
8
8
8