PIC12C672-04/P Microchip Technology, PIC12C672-04/P Datasheet - Page 594
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PIC12C672-04/P
Manufacturer Part Number
PIC12C672-04/P
Description
IC MCU OTP 2KX14 A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-04/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12C672-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 594 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
Figure 30-10: Example SPI Master Mode Timing (CKE = 1)
Table 30-22:
DS31030A-page 30-24
Param.
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
No.
71A
72A
73A
71
72
73
74
75
76
78
79
80
81
(CKP = 0)
(CKP = 1)
SDI
SS
SCK
SCK
SDO
† Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
B
Symbol
2
B
Refer to
Example SPI Mode Requirements (Master Mode, CKE = 1)
Characteristic
SCK input high time
(slave mode)
SCK input low time
(slave mode)
Setup time of SDI data input to SCK
edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise
time
SDO data output fall time
SCK output rise time
(master mode)
SCK output fall time (master mode)
SDO data output valid
after SCK edge
SDO data output setup to SCK edge
Figure 30-1
81
73
MSb IN
MSb
74
71
for load conditions.
75, 76
80
72
BIT6 - - - - - -1
BIT6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
1.25T
1.25T
1.5T
LSb IN
LSb
Min
T
100
100
CY
40
40
—
—
—
—
—
CY
CY
CY
+ 40
+ 30
+ 30
79
78
Typ† Max Units
—
—
—
—
—
—
—
10
20
10
10
20
10
—
—
—
1997 Microchip Technology Inc.
100
25
45
25
25
45
25
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
Note 1
Note 1
Conditions
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