PIC12C672-04/P Microchip Technology, PIC12C672-04/P Datasheet - Page 162

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PIC12C672-04/P

Manufacturer Part Number
PIC12C672-04/P
Description
IC MCU OTP 2KX14 A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets

Specifications of PIC12C672-04/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12C672-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PICmicro MID-RANGE MCU FAMILY
10.1
DS31010A-page 10-2
Introduction
Some devices have an 8-bit wide Parallel Slave Port (PSP). This port is multiplexed onto one of
the devices I/O ports. The PORT operates as an 8-bit wide Parallel Slave Port, or microprocessor
port, when the PSPMODE control bit is set. In this mode, the input buffers are TTL.
In slave mode the module is asynchronously readable and writable by the external world through
RD control input pin and the WR control input pin.
It can directly interface to an 8-bit microprocessor data bus. The external microprocessor can
read or write the PORT latch as an 8-bit latch. Setting the PSPMODE bit enables port pins to be
the RD input, the WR input, and the CS (chip select) input.
There are actually two 8-bit latches, one for data-out (from the PICmicro) and one for data input.
The user writes 8-bit data to PORT data latch and reads data from the port pin latch (note that
they have the same address). In this mode, the TRIS register is ignored, since the microproces-
sor is controlling the direction of data flow.
Figure 10-1
Figure 10-1: PORTD and PORTE Block Diagram (Parallel Slave Port)
Note 1: At present the Parallel Slave Port (PSP) is only multiplexed onto PORTD and
Note 2: In this mode the PORTD and PORTE input buffers are TTL. The control bits for the
Note: I/O pins have protection diodes to V
Data bus
One bit of PORTD
Set interrupt flag
PSPIF
PORTE. The microprocessor port becomes enabled when the PSPMODE bit is set.
In this mode, the user must make sure that PORTD and PORTE are configured as
digital I/O. That is, peripheral modules multiplexed onto the PSP functions are dis-
abled (such as the A/D).
When PORTE is configured for digital I/O. PORTD will override the values in the
TRISD register.
PSP operation are located in TRISE.
shows the block diagram for the PSP.
RD Port
WR Port
Q
D
CK
EN
EN
EN
D
Q
DD
and V
SS
.
TTL
Read
Chip Select
Write
1997 Microchip Technology Inc.
TTL
TTL
TTL
PSP7:PSP0
RD
CS
WR

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