ATTINY24-20PU Atmel, ATTINY24-20PU Datasheet - Page 128

IC MCU AVR 2K FLASH 20MHZ 14-DIP

ATTINY24-20PU

Manufacturer Part Number
ATTINY24-20PU
Description
IC MCU AVR 2K FLASH 20MHZ 14-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY24-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-DIP (0.300", 7.62mm)
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
128
ATtiny24/44/84
Table 14-2
used for the USI Data Register and the 4-bit counter.
Table 14-2.
• Bit 1 – USICLK: Clock Strobe
Writing a one to this bit location strobes the USI Data Register to shift one step and the counter
to increment by one, provided that the software clock strobe option has been selected by writing
USICS1:0 bits to zero. The output will change immediately when the clock strobe is executed,
i.e., during the same instruction cycle. The value shifted into the USI Data Register is sampled
the previous instruction cycle.
When an external clock source is selected (USICS1 = 1), the USICLK function is changed from
a clock strobe to a Clock Select Register. Setting the USICLK bit in this case will select the
USITC strobe bit as clock source for the 4-bit counter (see
The bit will be read as zero.
• Bit 0 – USITC: Toggle Clock Port Pin
Writing a one to this bit location toggles the USCK/SCL value either from 0 to 1, or from 1 to 0.
The toggling is independent of the setting in the Data Direction Register, but if the PORT value is
to be shown on the pin the corresponding DDR pin must be set as output (to one). This feature
allows easy clock generation when implementing master devices.
When an external clock source is selected (USICS1 = 1) and the USICLK bit is set to one, writ-
ing to the USITC strobe bit will directly clock the 4-bit counter. This allows an early detection of
when the transfer is done when operating as a master device.
The bit will read as zero.
USICS1
0
0
0
1
1
1
1
shows the relationship between the USICS1:0 and USICLK setting and clock source
USICS0
Relationship between the USICS1:0 and USICLK Setting
0
0
1
0
1
0
1
USICLK
0
1
X
0
0
1
1
Clock Source
No Clock
Software clock strobe (USICLK)
Timer/Counter0 Compare Match
External, positive edge
External, negative edge
External, positive edge
External, negative edge
Table
4-bit Counter Clock Source
No Clock
Software clock strobe (USICLK)
Timer/Counter0 Compare Match
External, both edges
External, both edges
Software clock strobe (USITC)
Software clock strobe (USITC)
14-2).
8006K–AVR–10/10

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