PIC16LF1933-I/SS Microchip Technology, PIC16LF1933-I/SS Datasheet - Page 213

• Manufacturer Part Number: PIC16LF1933-I/SS
• Description: IC PIC MCU FLASH 4K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1933-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16LF
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Embedded Interface Type: AUSART, EUSART, I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.2.5
The Compare mode is dependent upon the system
clock (F
down during Sleep mode, the Compare mode will not
function properly during Sleep.
TABLE 22-3:
 2009 Microchip Technology Inc.
CCPxCON
CCPRxL
CCPRxH
INTCON
PIE1
PIE2
PIE3
PIR1
PIR2
PIR3
T1CON
T1GCON
TMR1L
TMR1H
TRISA
TRISB
TRISC
TRISD
TRISE
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Compare mode.
Note 1:
Name
(2)
2:
OSC
Applies to ECCP modules only.
These bits are not implemented on PIC16F1933/1936/1938/PIC16LF1933/1936/1938 devices, read as ‘0’.
COMPARE DURING SLEEP
) for proper operation. Since F
Capture/Compare/PWM Register x Low Byte (LSB)
Capture/Compare/PWM Register x High Byte (MSB)
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TMR1GIE
TMR1GIF
TMR1GE
TRISC7
TRISD7
TRISA7
TRISB7
OSFIE
OSFIF
Bit 7
GIE
TMR1CS<1:0>
—
—
—
PxM<1:0>
SUMMARY OF REGISTERS ASSOCIATED WITH COMPARE
T1GPOL
CCP5IE
CCP5IF
TRISA6
TRISB6
TRISC6
TRISD6
ADIE
Bit 6
PEIE
C2IE
ADIF
C2IF
(1)
—
TMR0IE
CCP4IE
CCP4IF
TRISA5
TRISB5
TRISC5
TRISD5
T1GTM
RCIE
RCIF
Bit 5
C1IE
C1IF
T1CKPS<1:0>
—
DCxB<1:0>
OSC
T1GSPM T1GGO/DONE
is shut
CCP3IE
CCP3IF
TRISC4
TRISD4
TRISA4
TRISB4
INTE
TXIE
EEIE
EEIF
Bit 4
TXIF
—
Preliminary
T1OSCEN
TMR6IE
TMR6IF
TRISC3
TRISD3
TRISA3
TRISB3
TRISE3
SSPIE
BCLIE
SSPIF
BCLIF
IOCIE
Bit 3
PIC16F193X/LF193X
TRISE2
T1SYNC
T1GVAL
TMR0IF
CCP1IE
CCP1IF
TRISC2
TRISD2
TRISA2
TRISB2
LCDIE
LCDIF
CCPxM<3:0>
Bit 2
—
—
(2)
TRISE1
TMR2IE
TMR4IE
TMR2IF
TMR4IF
TRISA1
TRISB1
TRISC1
TRISD1
Bit 1
INTF
—
—
—
T1GSS<1:0>
(2)
TRISE0
TMR1ON
TMR1IE
CCP2IE
TMR1IF
CCP2IF
TRISA0
TRISB0
TRISC0
TRISD0
IOCIF
Bit 0
DS41364D-page 213
—
—
(2)
Register
on Page
231
210
210
100
101
102
103
104
105
201
202
197
197
132
137
140
143
146
99