ATTINY25-20PU Atmel, ATTINY25-20PU Datasheet - Page 224

• Manufacturer Part Number: ATTINY25-20PU
• Description: IC AVR MCU 2K 20MHZ 8-DIP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-20PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 4
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 6.35 mm
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Rev. 2586J-12/06
ATtiny25/45/85
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10. Updated Package Description in Sections:
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“Errata ATtiny85” on page 221
“ATtiny25” on page 209
“ATtiny45” on page 210
“ATtiny85” on page 211
“S8S1” on page 214
“ATtiny25” on page 209
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Updated description of instruction length in
Updated Flash size in
page
Updated cross-references in sections
“Write”
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Replaced single clocking system figure with two:
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Updated “Bit 0” in
Added footnote to
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Updated and moved section “Timer/Counter0 Prescaler and Clock Sources”, now
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Added recommended maximum frequency
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“PLLCSR – PLL Control and Status Register” on page
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129.
, starting on
“Low Power Consumption” on page
“Atomic Byte Programming” on page
“Internal PLL for Fast Peripheral Clock Generation - clkPCK” on page
Table 6-1 on page
“Calibrated Internal Oscillator” on page
Table 6-5 on page
“OSCCAL – Oscillator Calibration Register” on page
“CLKPR – Clock Prescale Register” on page
“Power-down Mode” on page
Table 10-5 on page
“Timer/Counter1 Initialization for Asynchronous Mode” on page
Figure 17-8 on page 133
“Temperature Measurement” on page
Table 17-3 on page
page
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“PRR – Power Reduction Register” on page
Table 8-3 on page
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“MCUCR – MCU Control Register” on page
“In-System Re-programmable Flash Program Memory” on
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“PLLCSR – PLL Control and Status Register” on page 97
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Table 6-13 on page 30
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“Atomic Byte Programming”
in“Prescaling and Conversion Timing” on
“Architectural Overview”
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Figure 6-2
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