ATTINY13A-SSU Atmel, ATTINY13A-SSU Datasheet - Page 115

IC MCU AVR 1K FLASH 20MHZ 8SOIC

ATTINY13A-SSU

Manufacturer Part Number
ATTINY13A-SSU
Description
IC MCU AVR 1K FLASH 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY13A-SSU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI
Total Internal Ram Size
64Byte
# I/os (max)
6
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
On-chip Adc
4-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC
Package
8SOIC
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
6
Number Of Timers
1
Processor Series
ATTINY1x
Core
AVR8
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAKSTK511
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Compliant

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17.8.3
17.8.4
17.8.5
17.8.6
8126E–AVR–07/10
Programming the EEPROM
Reading the Flash
Reading the EEPROM
Programming and Reading the Fuse and Lock Bits
Figure 17-4. High-voltage Serial Programming Waveforms
The EEPROM is organized in pages, see
EEPROM, the data is latched into a page buffer. This allows one page of data to be pro-
grammed simultaneously. The programming algorithm for the EEPROM Data memory is as
follows (refer to
The algorithm for reading the Flash memory is as follows (refer to
The algorithm for reading the EEPROM memory is as follows (refer to
111):
The algorithms for programming and reading the fuse low/high bits and lock bits are shown in
Table 17-13 on page
SDO
1. Load Command “Write EEPROM”.
2. Load EEPROM Page Buffer.
3. Program EEPROM Page. Wait after Instr. 2 until SDO goes high for the “Page Pro-
4. Repeat 2 through 3 until the entire EEPROM is programmed or until all data has been
5. End Page Programming by Loading Command “No Operation”.
1. Load Command "Read Flash".
2. Read Flash Low and High Bytes. The contents at the selected address are available at
1. Load Command “Read EEPROM”.
2. Read EEPROM Byte. The contents at the selected address are available at serial out-
PB0
PB1
PB2
PB3
SDI
SCI
SII
gramming” cycle to finish.
programmed.
serial output SDO.
put SDO.
0
MSB
Table 17-13 on page
MSB
MSB
1
111.
2
3
111):
4
Table 18-9 on page
5
6
7
LSB
LSB
LSB
122. When programming the
8
Table 17-13 on page
9
Table 17-13 on page
10
111):
115

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