PIC12CE518-04/SM Microchip Technology, PIC12CE518-04/SM Datasheet - Page 352

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PIC12CE518-04/SM

Manufacturer Part Number
PIC12CE518-04/SM
Description
IC MCU OTP 512X12 W/EE 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12CE518-04/SM

Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
25Byte
Cpu Speed
4MHz
No. Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
DS31018A-page 18-16
PIR
RCSTA
TXREG
PIE
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented, read as '0'.
Note 1: The position of this bit is device dependent.
RX/DT pin
TX/CK pin
TXREG reg
Write to
Name
(Interrupt flag)
TXEN bit
TRMT bit
TXIF bit
TRMT
TXREG reg
Shaded cells are not used for Synchronous Master Transmission.
RX/DT pin
TX/CK pin
TRMT bit
Q1Q2 Q3Q4 Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2 Q3Q4
CSRC
SPEN
'1'
TXIF bit
Bit 7
Write to
TX7
Note: Sync master mode; SPBRG = '0'. Continuous transmission of two 8-bit words.
Write word1
Steps to follow when setting up a Synchronous Master Transmission:
1.
2.
3.
4.
5.
6.
7.
Table 18-8: Registers Associated with Synchronous Master Transmission
Figure 18-10:
Figure 18-11:
Bit 6
RX9
TX6
TX9
Initialize the SPBRG register for the appropriate baud rate (Subsection
Baud Rate Generator (BRG)”
Enable the synchronous master serial port by setting the SYNC, SPEN, and CSRC bits.
If interrupts are desired, then set the TXIE bit.
If 9-bit transmission is desired, then set the TX9 bit.
Enable the transmission by setting the TXEN bit.
If 9-bit transmission is selected, the ninth bit should be loaded in the TX9D bit.
Start transmission by loading data to the TXREG register.
SREN CREN
TXEN SYNC
Bit 0
Bit 5
TX5
Write word2
WORD 1
Bit 1
Bit 4
TX4
bit0
Synchronous Transmission
Synchronous Transmission (Through TXEN)
TXIF
TXIE
Bit 2
Bit 3
TX3
(1)
(1)
bit1
BRGH
FERR
Bit 2
).
TX2
Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4
bit2
Bit 7
OERR
TRMT
Bit 1
TX1
Bit 0
RX9D
WORD 2
TX9D
Bit 0
TX0
bit6
Bit 1
0000 -00x
0000 0000
0000 -010
0000 0000
Value on:
1997 Microchip Technology Inc.
POR,
BOR
0
0
bit7
18.3 “USART
other Resets
Value on all
0000 -00x
0000 0000
0000 -010
0000 0000
Bit 7
0
0
'1'

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