PIC16F677-I/SO Microchip Technology, PIC16F677-I/SO Datasheet - Page 105
![IC PIC MCU FLASH 2KX14 20SOIC](/photos/6/64/66480/150-20-soic_sml.jpg)
PIC16F677-I/SO
Manufacturer Part Number
PIC16F677-I/SO
Description
IC PIC MCU FLASH 2KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F677-I/SO
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-SOIC (7.5mm Width)
Mfg Application Notes
Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- PIC16F677-ISO PDF datasheet #5
- Current page: 105 of 306
- Download datasheet (6Mb)
REGISTER 8-4:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
R/W-0
SR1
2:
(2)
The CxOUT bit in the CMxCON0 register will always reflect the actual comparator output (not the level on
the pin), regardless of the SR latch operation.
To enable an SR latch output to the pin, the appropriate CxOE and TRIS bits must be properly configured.
SR1: SR Latch Configuration bit
1 =
0 =
SR0: SR Latch Configuration bits
1 =
0 =
C1SEN: C1 Set Enable bit
1 = C1 comparator output sets SR latch
0 = C1 comparator output has no effect on SR latch
C2REN: C2 Reset Enable bit
1 = C2 comparator output resets SR latch
0 = C2 comparator output has no effect on SR latch
PULSS: Pulse the SET Input of the SR Latch bit
1 = Triggers pulse generator to set SR latch. Bit is immediately reset by hardware.
0 = Does not trigger pulse generator
PULSR: Pulse the Reset Input of the SR Latch bit
1 = Triggers pulse generator to reset SR latch. Bit is immediately reset by hardware.
0 = Does not trigger pulse generator
Unimplemented: Read as ‘0’
SR0
R/W-0
C2OUT pin is the latch Q output
C2OUT pin is the C2 comparator output
C1OUT pin is the latch Q output
C1OUT pin is the Comparator C1 output
SRCON: SR LATCH CONTROL REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
S = Bit is set only
C1SEN
R/W-0
PIC16F631/677/685/687/689/690
C2REN
(2)
R/W-0
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PULSS
R/S-0
PULSR
R/S-0
x = Bit is unknown
U-0
—
DS41262E-page 103
U-0
—
bit 0
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