PESD5V0L7BAS,118 NXP Semiconductors, PESD5V0L7BAS,118 Datasheet - Page 7

• Manufacturer Part Number: PESD5V0L7BAS,118
• Description: DIODE ARRAY 7FOLD BIDIRECT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of PESD5V0L7BAS,118

• Package / Case: 8-TSSOP
• Voltage - Reverse Standoff (typ): 5V
• Voltage - Breakdown: 7.2V
• Power (watts): 35W
• Polarization: 7 Channel Array - Bidirectional
• Mounting Type: Surface Mount
• Polarity: Bidirectional
• Clamping Voltage: 17 V
• Operating Voltage: 5 V
• Breakdown Voltage: 7.2 V
• Peak Surge Current: 2.5 A
• Peak Pulse Power Dissipation: 35 W
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Dimensions: 3.1(Max) mm W x 3.1(Max) mm L
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 934057922118; PESD5V0L7BAS /T3; PESD5V0L7BAS /T3; Q2436459

NXP Semiconductors
7. Application information
PESD5V0L7BAS_BS
Product data sheet
The PESD5V0L7BAS and the PESD5V0L7BS are designed for the protection of up to
seven bidirectional data lines from the damage caused by ElectroStatic Discharge (ESD)
and surge pulses. The PESD5V0L7BAS and the PESD5V0L7BS may be used on lines
where the signal polarities are above and below ground.
The PESD5V0L7BAS and the PESD5V0L7BS provide a surge capability of 35 W per line
for a 8/20 s waveform.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
Fig 8.
ground loops.
vias.
Typical application for ESD protection of seven lines carrying bidirectional data
All information provided in this document is subject to legal disclaimers.
PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
Rev. 4 — 23 June 2010
GND
PESD5V0L7BAS
PESD5V0L7BS
006aaa063
high-speed
data lines
© NXP B.V. 2010. All rights reserved.
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