MAX13208EALB+T Maxim Integrated Products, MAX13208EALB+T Datasheet - Page 5

• Manufacturer Part Number: MAX13208EALB+T
• Description: IC ESD PROTECTOR 8I/O 10UDFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX13208EALB+T

• Power (watts): 403mW
• Polarization: 8 Channel Array - Unidirectional
• Mounting Type: Surface Mount
• Package / Case: 10-µDFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Breakdown: -
• Voltage - Reverse Standoff (typ): -
• Other names: MAX13208EALB+T; MAX13208EALB+TTR

During an ESD event, the current pulse rises from zero
to peak value in nanoseconds (Figure 3). For example,
in a ±15kV IEC-61000-4-2 Air-Gap Discharge ESD
event, the pulse current rises to approximately 45A in
1ns (di/dt = 45 x 10
an additional 450V to the clamp voltage. An inductance
of 10nH represents approximately 0.5in of board trace.
Regardless of the device’s specified diode clamp volt-
age, a poor layout with parasitic inductance significantly
increases the effective clamp voltage at the protected
signal line.
A low-ESR 0.1µF capacitor must be used between V
and GND. This bypass capacitor absorbs the charge
transferred by a +14kV (MAX13204E/MAX13206E/
MAX13208E) and ±12kV (MAX13202E) IEC61000-4-2
Contact Discharge ESD event.
Ideally, the supply rail (V
caused by a positive ESD strike without changing its
regulated value. In reality, all power supplies have an
effective output impedance on their positive rails. If a
power supply’s effective output impedance is 1Ω, then
by using V = I × R, the clamping voltage of V
es by the equation V
IEC 61000-4-2 ESD event generates a current spike of
24A, so the clamping voltage increases by V
1Ω, or V
bypassing increases the clamping voltage. A ceramic
chip capacitor mounted as close to the MAX13202E/
MAX13204E/MAX13206E/MAX13208E V
best choice for this application. A bypass capacitor
should also be placed as close to the protected device
as possible.
Figure 3. IEC 61000-4-2 ESD Generator Current Waveform
2-/4-/6-/8-Channel, ±30kV ESD Protectors in µDFN
t
R
= 0.7ns to 1ns
C
100%
90%
10%
= 24V. Again, a poor layout without proper
I
_______________________________________________________________________________________
30ns
9
). An inductance of only 10nH adds
C
CC
= I
60ns
) would absorb the charge
ESD
x R
OUT
CC
. An ±8kV
C
C
pin is the
= 24A ×
increas-
t
CC
ESD protection can be tested in various ways. The
MAX13202E/MAX13204E/MAX13206E/MAX13208E are
characterized for protection to the following limits:
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Figure 4. Human Body ESD Test Model
Figure 5. Human Body Model Current Waveform
• ±15kV using the Human Body Model
• ±14kV (MAX13204E/MAX13206E/MAX13208E) and
• ±30kV using the IEC 61000-4-2 Air-Gap Discharge
AMPERES
VOLTAGE
SOURCE
±12kV (MAX13202E) using the Contact Discharge
method specified in IEC 61000-4-2
method
HIGH-
DC
I
P
36.8%
100%
90%
10%
CHARGE-CURRENT-
0
LIMIT RESISTOR
0
1MΩ
t
RL
R
C
100pF
C s
CURRENT WAVEFORM
STORAGE
CAPACITOR
TIME
1.5kΩ
RESISTANCE
DISCHARGE
±30kV ESD Protection
R
D
t
DL
I r
ESD Test Conditions
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
DEVICE
UNDER
TEST
5