C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 6

KIT DEV FOR C8051F326/7

C8051F326DK

Manufacturer Part Number
C8051F326DK
Description
KIT DEV FOR C8051F326/7
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F326DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F326
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F326, C8051F327
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1306
C8051F326/7-DK
6.1. System Clock Sources
The C8051F326 device installed on the target board features a calibrated programmable internal oscillator which is
enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of 1.5 MHz
(±1.5%) by default but may be configured by software to operate at other frequencies. Therefore, in many applica-
tions an external oscillator is not required. However, if you wish to operate the C8051F326 device at a frequency not
available with the internal oscillator, an external CMOS oscillator may be used. Refer to the C8051F326/7 datasheet
for more information on configuring the system clock source.
The target board is designed to facilitate the installation of an external CMOS oscillator. Remove shorting block at
header J10 and connect the oscillator output to the header. Refer to the C8051F326/7 datasheet for more informa-
tion on the use of external oscillators.
6.2. Switches and LEDs
Three switches are provided on the target board. Switch S1 is connected to the /RST pin of the C8051F326. Press-
ing S1 puts the device into its hardware-reset state. Switches S2 and S3 are connected to the C8051F326’s gen-
eral purpose I/O (GPIO) pins through headers. Pressing S2 or S3 generates a logic low signal on the port pin.
Remove the shorting blocks from the header to disconnect S2 and S3 from the port pins. The port pin signals are
also routed to pins on the J1 I/O connector. See Table 1 for the port pins and headers corresponding to each
switch.
Three LEDs are also provided on the target board. The red LED labeled PWR LED is used to indicate a power con-
nection to the target board. The green surface mount LEDs labeled with port pin names are connected to the
C8051F326’s GPIO pins through headers. Remove the shorting blocks from the header to disconnect the LEDs
from the port pin. The port pin signals are also routed to pins on the J1 I/O connector. See Table 1 for the port pins
and headers corresponding to each LED.
6.3. Universal Serial Bus (USB) Interface (J9)
A Universal Serial Bus (USB) connector (J9) is provided to facilitate connections to the USB interface on the
C8051F326. Table 2 shows the J9 pin definitions.
6
Table 2. J9 USB Connector Pin Descriptions
Green LED (D4)
Green LED (D2)
Description
Table 1. Target Board I/O Descriptions
Red LED
Pin #
S1
S2
S3
1
2
3
4
Rev. 0.2
Reset
PWR
P2.0
P2.1
P2.2
P2.3
I/O
GND (Ground)
Description
VBUS
D–
D+
Header
J3[1–2]
J3[3–4]
J3[5–6]
J3[7–8]
none
none

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