XE8000EV110 Semtech, XE8000EV110 Datasheet - Page 137
XE8000EV110
Manufacturer Part Number
XE8000EV110
Description
EVAL BOARD FOR XE8802AMI035LF
Manufacturer
Semtech
Type
MCUr
Specifications of XE8000EV110
Contents
Fully Assembled Evaluation Board
For Use With/related Products
XE88LC02MI035
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Offset error is defined as the output code error for a zero volt input (ideally, output code = 0). The offset of the ADC
and the PGA1 stage are completely suppressed if N
The measured offset drift vs. temperature curves for different PGA gains are depicted in Figure 17-20. The output
offset error, expressed in LSB for 16-bit setting, is normalized to 25°C. Notice that if the ADC is used alone, the
output offset error is below ±1 LSB and has no drift.
17.8.6
Figure 17-21 plots the variation of quiescent current consumption with supply voltage V
distribution between the 3 PGA stages and the ADC (see Table 17-28). As shown in Figure 17-22, if lower
sampling frequency is used, the quiescent current consumption can be lowered by reducing the bias currents of the
PGAs and the ADC with registers IB_AMP_PGA
IB_AMP_PGA/ADC[1:0] = '11', '10', '00' for f
Quiescent current consumption vs. temperature is depicted in Figure 17-23, showing a relative increase of nearly
40% between -45 and +85°C. Figure 17-24 shows the variation of quiescent current consumption for different
frequency settings of the internal RC oscillator. It can be seen that the quiescent current varies by about 20%
between 100kHz and 2MHz.
© Semtech 2006
Power Consumption
Figure 17-20. Offset error vs. temperature for different PGA gains
Figure 17-19. Gain error vs. temperature for different PGA gains
-0.1
-0.2
-0.3
-0.4
100
0.2
0.1
0.0
-20
-40
80
60
40
20
0
-50
-50
XE8802 Sensing Machine Data Acquisition MCU
S
= 500, 250, 62.5kHz respectively.)
NORMALIZED TO 25°C
-25
NORMALIZED TO 25°C
-25
ELCONV
Temperature [°C]
Temperature [°C]
0
0
17-25
[1:0] and IB_AMP_ADC
> 1.
25
25
with ZoomingADC™ and LCD driver
50
50
75
75
1
5
20
100
1
5
20
100
100
100
[1:0]. (In Figure 17-22,
DD
, as well as the
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