LM95213EB/NOPB National Semiconductor, LM95213EB/NOPB Datasheet - Page 31

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LM95213EB/NOPB

Manufacturer Part Number
LM95213EB/NOPB
Description
BOARD EVALUATION FOR LM95213
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheets

Specifications of LM95213EB/NOPB

Sensor Type
Temperature
Sensing Range
-40°C ~ 140°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1°C
Voltage - Supply
3 V ~ 3.6 V
Embedded
No
Utilized Ic / Part
LM95213
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM95213EB
processor. National Semiconductor temperature sensors are
always calibrated to the typical non-ideality and series resis-
tance of a given processor type. The LM95213 is calibrated
for non-ideality factor and series resistance values supporting
the MMBT3904 transistor without the requirement for addi-
tional trims. When a temperature sensor calibrated for a
particular processor type is used with a different processor
type, additional errors are introduced.
Temperature errors associated with non-ideality of different
processor types may be reduced in a specific temperature
range of concern through use of software calibration. Typical
Non-ideality specification differences cause a gain variation
of the transfer function, therefore the center of the tempera-
ture range of interest should be the target temperature for
calibration purposes. The following equation can be used to
calculate the temperature correction factor (T
compensate for a target non-ideality differing from that sup-
ported by the LM95213.
where
The correction factor should be directly added to the temper-
ature reading produced by the LM95213. For example when
using the LM95213 to measure a AMD Athlon processor, with
a typical non-ideality of 1.008, for a temperature range of 60
°C to 100 °C the correction factor would calculate to:
Therefore, 1.75°C should be subtracted from the temperature
readings of the LM95213 to compensate for the differing typ-
ical non-ideality target.
3.2 PCB LAYOUT FOR MINIMIZING NOISE
In a noisy environment, such as a processor mother board,
layout considerations are very critical. Noise induced on
traces running between the remote temperature diode sensor
and the LM95213 can cause temperature conversion errors.
Keep in mind that the signal level the LM95213 is trying to
η
η
T
S
PROCESSOR
CR
= LM95213 non-ideality for accuracy specification
= center of the temperature range of interest in °C
FIGURE 9. Ideal Diode Trace Layout
= Processor thermal diode typical non-ideality
CF
) required to
30013817
(7)
(8)
31
measure is in microvolts. The following guidelines should be
followed:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Noise coupling into the digital lines greater than 400 mVp-p
(typical hysteresis) and undershoot less than 500 mV below
GND, may prevent successful SMBus communication with
the LM95213. SMBus no acknowledge is the most common
symptom, causing unnecessary traffic on the bus. Although
the SMBus maximum frequency of communication is rather
low (100 kHz max), care still needs to be taken to ensure
proper termination within a system with multiple parts on the
bus and long printed circuit board traces. An RC lowpass filter
with a 3 dB corner frequency of about 40 MHz is included on
the LM95213's SMBCLK input. Additional resistance can be
added in series with the SMBDAT and SMBCLK lines to fur-
ther help filter noise and ringing. Minimize noise coupling by
keeping digital traces out of switching power supply areas as
well as ensuring that digital lines containing high speed data
communications cross at right angles to the SMBDAT and
SMBCLK lines.
V
parallel with 100 pF. The 100 pF capacitor should be
placed as close as possible to the power supply pin. A
bulk capacitance of approximately 10 µF needs to be in
the near vicinity of the LM95213.
A 100 pF diode bypass capacitor is recommended to filter
high frequency noise but may not be necessary. Make
sure the traces to the 100 pF capacitor are matched.
Place the filter capacitors close to the LM95213 pins.
Ideally, the LM95213 should be placed within 10 cm of
the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resistance
of 1Ω can cause as much as 0.62°C of error. This error
can be compensated by using simple software offset
compensation.
Diode traces should be surrounded by a GND guard ring
to either side, above and below if possible. This GND
guard should not be between the D+ and D− lines. In the
event that noise does couple to the diode lines it would
be ideal if it is coupled common mode. That is equally to
the D+ and D− lines.
Avoid routing diode traces in close proximity to power
supply switching or filtering inductors.
Avoid running diode traces close to or parallel to high
speed digital and bus lines. Diode traces should be kept
at least 2 cm apart from the high speed digital traces.
If it is necessary to cross high speed digital traces, the
diode traces and the high speed digital traces should
cross at a 90 degree angle.
The ideal place to connect the LM95213's GND pin is as
close as possible to the Processors GND associated with
the sense diode.
Leakage current between D+ and GND and between D+
and D− should be kept to a minimum. Thirteen nano-
amperes of leakage can cause as much as 0.2°C of error
in the diode temperature reading. Keeping the printed
circuit board as clean as possible will minimize leakage
current.
DD
should be bypassed with a 0.1 µF capacitor in
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