ISL6740EVAL1 Intersil, ISL6740EVAL1 Datasheet - Page 15

• Manufacturer Part Number: ISL6740EVAL1
• Description: EVALUATION BOARD 1 ISL6740
• Manufacturer: Intersil

Specifications of ISL6740EVAL1

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 12V
• Current - Output: 8A
• Voltage - Input: 48V
• Regulator Topology: Buck
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6740
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Frequency - Switching: -

Circuit Element Descriptions
The converter design may be broken down into the following
functional blocks:
Input Filtering: L
Half-Bridge Capacitors: C
Isolation Transformer: T
Primary Snubber: C
Start Bias Regulator: C
Supply Bypass Components: R
Main MOSFET Power Switch: QH, QL
Current Sense Network: T
Control Circuit: U
C
Output Rectification and Filtering: Q
C
Secondary Snubber: R
FET Driver: U
ZVS Resonant Delay (Optional): L
Design Criteria
The following design requirements were selected:
Switching Frequency, Fsw: 235kHz
V
V
P
Efficiency: 95%
Ripple: 1%
Transformer Design
The design of a transformer for a half-bridge application is a
straight forward affair, although iterative. It is a process of
many compromises, and even experienced designers will
produce different designs when presented with identical
requirements. The iterative design process is not presented
here for clarity.
The abbreviated design process follows:
• Select a core geometry suitable for the application.
• Determine the turns ratio.
• Select suitable core material(s).
• Select maximum flux density desired for operation.
• Select core size. Core size will be dictated by the
18
9
IN
OUT
OUT
Constraints of height, footprint, mounting preference, and
operating environment will affect the choice.
capability of the core structure to store the required
, C
: 48 ±10%V
, C
8
: 12V (nominal) @ I
: 100W
17
1
1
3
, C
, R
13
1
T1
, R
, R
8
R3
, R
1
, R
1
10
2
OUT
2
, R
, C
14
, C
9
, C
2
, R
15
R1
3
, R
= 8A
11
3
19
, C
7
, C
, C
, C
, R
R2
3
15
, C
R1
12
6
13
, R
, C
, Q
7
, Q
, R
5
4
5
, R
R2
, C
15
, D
6
, R
, Q
5
1
, R
17
R3
11
, R
, C
, Q
18
ISL6740, 1SL6741
10
R4
, C
, C
, L
16
14
2
,
,
• Determine maximum desired flux density. Depending on
• Determine the number of primary turns.
• Select the wire gauge for each winding.
• Determine winding order and insulation requirements.
• Verify the design.
For this application we have selected a planar structure to
achieve a low profile design. A PQ style core was selected
because of its round center leg cross section, but there are
many suitable core styles available.
Since the converter is operating open loop at nearly 100%
duty cycle, the turns ratio, N, is simply the ratio of the input
voltage to the output voltage divided by 2.
The factor of 2 divisor is due to the half-bridge topology. Only
half of the input voltage is applied to the primary of the
transformer.
A PC44HPQ20/6 “E-Core” plus a PC44PQ20/3 “I-Core” from
TDK were selected for the transformer core. The ferrite
material is PC44.
The core parameter of concern for flux density is the
effective core cross sectional area, Ae. For the PQ core
pieces selected:
Ae = 0.62cm
Using Faraday’s Law, V = N dΦ/dt, the number of primary
turns can be determined once the maximum flux density is
set. An acceptable Bmax is ultimately determined by the
allowable power dissipation in the ferrite material and is
N
energy, the number of turns that have to be wound, and
the wire gauge needed. Often the window area (the space
used for the windings) and power loss determine the final
core size.
the frequency of operation, the core material selected, and
the operating environment, the allowed flux density must
be determined. The decision of what flux density to allow
is often difficult to determine initially. Usually the highest
flux density that produces an acceptable design is used,
but often the winding geometry dictates a larger core than
is indicated based on flux density alone.
=
------------------------ -
V
OUT
V
IN
FIGURE 7. TRANSFORMER SCHEMATIC
•
2
2
or 6.2e -5m
=
-------------- -
12 2
n
48
P
•
=
2
2
n
n
n
n
SR
S
S
SR
July 13, 2007
(EQ. 14)
FN9111.4