STEVAL-ISA051V2 STMicroelectronics, STEVAL-ISA051V2 Datasheet

BOARD EVAL PM6670AS DDR2/3

STEVAL-ISA051V2

Manufacturer Part Number
STEVAL-ISA051V2
Description
BOARD EVAL PM6670AS DDR2/3
Manufacturer
STMicroelectronics
Type
DC/DC Switching Converters, Regulators & Controllersr
Datasheets

Specifications of STEVAL-ISA051V2

Design Resources
STEVAL-ISA051V2 Gerber Files STEVAL-ISA051V2 Schematic STEVAL-ISA051V2 Bill of Material
Main Purpose
Special Purpose DC/DC, DDR Memory Supply
Outputs And Type
4, Non-Isolated
Voltage - Output
1.5V, 1.8V
Voltage - Input
4.5 ~ 36V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
PM6670A
Input Voltage
4.5 V to 36 V
Output Voltage
1.8 V, 1.5 V
Product
Power Management Modules
Silicon Manufacturer
ST Micro
Silicon Core Number
PM6670AS
Kit Application Type
Power Management
Application Sub Type
DDR2/3 Memory Power Supply Controller
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
PM6670AS
Other names
497-8412

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STEVAL-ISA051V2
Manufacturer:
STMicroelectronics
Quantity:
1
Features
Applications
Table 1.
February 2010
Switching section (VDDQ)
– 4.5 V to 36 V input voltage range
– 0.9 V, ±1% voltage reference
– 1.8 V (DDR2) or 1.5 V (DDR3) fixed output
– 0.9 V to 2.6 V adjustable output voltage
– 1.237 V ±1% reference voltage available
– Very fast load transient response using
– No R
– Negative current limit
– Latched OVP and UVP
– Soft-start internally fixed at 3 ms
– Selectable pulse skipping at light load
– selectable no-audible (33 kHz) pulse skip
– Ceramic output capacitors supported
– Output voltage ripple compensation
VTT LDO and VTTREF
– 2 Apk LDO with foldback for VTT
– Remote VTT sensing
– High-Z VTT output in S3
– Ceramic output capacitors supported
– ±15 mA Low noise buffered reference
DDR2/3 memory supply
Digital TV system
SSTL18, SSTL15 and HSTL bus termination
voltages
constant-on-time control loop
MOSFETs' R
mode
PM6670ASTR
Order codes
SENSE
PM6670AS
Device summary
current sensing using low side
DS(ON)
Complete DDR2/3 memory power supply controller
VFQFPN-24 4x4 (Exposed pad)
Doc ID 14436 Rev 2
Package
Description
The device PM6670AS is a complete DDR2/3
power supply regulator designed to meet JEDEC
specifications.
It integrates a constant on-time (COT) buck
controller, a 2 Apk sink/source low drop out
regulator and a 15 mA low noise buffered
reference.
The COT architecture assures fast transient
response supporting both electrolytic and ceramic
output capacitors. An embedded integrator
control loop compensates the DC voltage error
due to the output ripple.
The 2 Apk sink/source linear regulator provides
the memory termination voltage with fast load
transient response.
The device is full compliant with system sleep
states S3 and S4/S5, providing LDO output high
impedance in Suspend-To-RAM and Tracking
Discharge of all outputs in Suspend-To-Disk.
Tape and reel
PM6670AS
Packaging
Tube
www.st.com
1/53
53

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STEVAL-ISA051V2 Summary of contents

Page 1

Complete DDR2/3 memory power supply controller Features ■ Switching section (VDDQ) – 4 input voltage range – 0.9 V, ±1% voltage reference – 1.8 V (DDR2) or 1.5 V (DDR3) fixed output voltages – 0.9 V ...

Page 2

Contents Contents 1 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

PM6670AS 7.3 S3 and S5 power management pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8 Application information ...

Page 4

Typical application circuit 1 Typical application circuit Figure 1. Application circuit VDDQ VDDQ ( ( LDO input) LDO input IN4 IN4 IN4 VTTREF VTTREF OUT3 OUT3 ...

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PM6670AS 2 Pin settings 2.1 Connections Figure 2. Pin connection (through top view) VTTGND VTTGND VTTGND VTTSNS VTTSNS VTTSNS DDRSEL DDRSEL DDRSEL VTTREF VTTREF VTTREF PM6670A PM6670A PM6670A PM6670A PM6675S PM6670AS SGND ...

Page 6

Pin settings 2.2 Pin description Table 2. Pin functions N° Pin 1 VTTGND 2 VTTSNS 3 DDRSEL 4 VTTREF 5 SGND 6 AVCC 7 VREF 8 VOSC 9 VSNS 10 MODE 11 COMP 12 DSCG ...

Page 7

PM6670AS Table 2. Pin functions (continued) N° Pin 18 VCC 19 CSNS 20 PHASE 21 HGATE 22 BOOT 23 LDOIN 24 VTT +5 V low-side gate driver supply. Bypass with a 100 nF capacitor to PGND. Current Sense Input for ...

Page 8

Electrical data 3 Electrical data 3.1 Maximum rating Table 3. Absolute maximum ratings Symbol V AVCC V VCC V PHASE P TOT 1. Free air operating conditions unless otherwise specified. Stresses beyond those listed under “absolute maximum ratings” may cause ...

Page 9

PM6670AS 4 Electrical characteristics T = -25 ° °C, VCC = AVCC = +5 V and LDOIN connected to VDDQ output if not A otherwise specified Table 6. Electrical characteristics Symbol Parameter Supply section I Operating current IN ...

Page 10

Electrical characteristics Table 6. Electrical characteristics (continued) Symbol Parameter DDR3 VDDQ output voltage V DDR2 VDDQ output voltage VDDQ Feedback accuracy Current limit and zero crossing comparator I CSNS input bias current CSNS Comparator offset Positive current limit threshold Fixed ...

Page 11

PM6670AS Table 6. Electrical characteristics (continued) Symbol Parameter VTTREF discharge resistance in non-tracking discharge mode VDDQ Output threshold synchronous for final tracking to non-tracking discharge transition V LDO section TT LDO input bias current in full- I LDOIN,ON on state ...

Page 12

Electrical characteristics Table 6. Electrical characteristics (continued) Symbol Parameter Power management section Turn OFF level S3,S5 Turn ON level MODE pin high level threshold V MODE MODE pin low level threshold DDRSEL pin high level threshold DDRSEL pin middle level ...

Page 13

PM6670AS 5 Typical operating characteristics Figure 3. Efficiency vs load - 1.5 V and 1.8 V, Vin = 12 V 100 0.001 0.01 0.1 Output current (A) Figure 5. Switching ...

Page 14

Typical operating characteristics Figure 9. VDDQ load regulation, 1.8 V, Vin = 12 V 1.860 1.850 1.840 1.830 1.820 1.810 1.800 0.001 0.01 0.1 Output current (A) Figure 11. VTT load regulation, 0.9 V, LDOIN = 1.8 V 0.940 0.930 ...

Page 15

PM6670AS Figure 15. Power-up sequence - AVCC above UVLO Figure 17 1.8 A VTT load transient, 0.9 V Typical operating characteristics Figure 16. VDDQ soft-start, 1.8 V, heavy load Figure 18 ...

Page 16

Typical operating characteristics Figure 19. Non-tracking (soft) discharge Figure 21 VDDQ load transient, PWM 16/53 Figure 20. Tracking (fast) discharge, LDOIN = VDDQ Figure 22 VDDQ load transient, PWM Doc ...

Page 17

PM6670AS Figure 23. Over-voltage protection, VDDQ = 1.8 V Typical operating characteristics Figure 24. Under-voltage protection, VDDQ = 1.8 V Doc ID 14436 Rev 2 17/53 ...

Page 18

Block diagram 6 Block diagram Figure 25. Functional and block diagram VTTSNS VTTSNS VTTSNS LDOIN LDOIN LDOIN VTT VTT VTT VTTGND VTTGND VTTGND VTTREF VTTREF VTTREF SGND SGND SGND AVCC AVCC AVCC DDRSEL DDRSEL DDRSEL DSCG DSCG DSCG Table 7. ...

Page 19

PM6670AS 7 Device description The PM6670AS is designed to satisfy DDR2-3 power supply requirements combining a synchronous buck controller buffered reference and a high-current low-drop out (LDO) linear regulator capable of sourcing and sinking ...

Page 20

Device description 7.1 VDDQ section - constant on-time PWM controller The PM6670AS uses a pseudo-fixed frequency, constant on-time (COT) controller as the core of the switching section well known that the COT controller uses a relatively simple algorithm ...

Page 21

PM6670AS The duty-cycle of the buck converter is, in steady-state conditions, given by Equation 2 The switching frequency is thus calculated as Equation 3 where Equation 4a Equation 4b Referring to the typical application schematic (figures on cover page and ...

Page 22

Device description Figure 27. Switching frequency selection and VOSC pin The suggested voltage range for VOSC pin is 0.3V to 2V, for better switching frequency programmability. 7.1.1 Constant-on-time architecture Figure 28 shows the simplified block diagram of the constant-on-time controller. ...

Page 23

PM6670AS Figure 28. Switching section simplified block diagram 7.1.2 Output ripple compensation and loop stability The loop is closed connecting the center tap of the output divider (internally, when the fixed output voltage is chosen, or externally, using the MODE ...

Page 24

Device description Figure 29. Circuitry for output ripple compensation COMP PIN VOLTAGE Vr OUTPUT VOLTAGE The additional capacitor is used to reduce the voltage on the COMP pin when higher than 300 mVpp and is unnecessary for most of applications. ...

Page 25

PM6670AS Equation 7 where μs is the integrator trans conductance. In order to ensure stability it must be also verified that: Equation 8 If the ripple on the COMP pin is greater than the integrator 150 mV, ...

Page 26

Device description Figure 30. “Virtual-ESR” Network T NODE VOLTAGE ΔV 1 The ripple on the COMP pin is the sum of the output voltage ripple and the triangular ripple generated by the Virtual-ESR Network. In fact the Virtual-ESR Network behaves ...

Page 27

PM6670AS Equation 14 Moreover, the C INT Equation 15 where R is the sum of the ESR of the output capacitor and the equivalent ESR given by TOT the Virtual-ESR Network (R determines the minimum integrator capacitor value C Equation ...

Page 28

Device description 7.1.3 Pulse-skip and no-audible pulse-skip modes High efficiency at light load conditions is achieved by PM6670AS entering the pulse-skip mode (if enabled). When one of the two fixed output voltages is set, pulse-skip power saving is a default ...

Page 29

PM6670AS has taken place within 30 μs (typ.) since the last one (because the output voltage is still higher than the reference), a no-audible pulse-skip cycle begins. The low-side MOSFET is turned on and the output is driven to fall ...

Page 30

Device description When the MODE pin is connected the PM6670AS allows setting the VDDQ voltage to 1 1.5 V just forcing the DDRSEL multilevel pin ground respectively (see Figure 33 ...

Page 31

PM6670AS Figure 34. Current sensing scheme An internal 120 μA current source is connected to C input of the positive current limit comparator. When the voltage drop developed across the sensing parameter equals the voltage drop across the programming resistor ...

Page 32

Device description The soft-start allows a gradual increase of the internal current limit threshold during start-up reducing the input/output surge currents. At the beginning of start-up, the PM6670AS current limit is set to 25% of nominal value and the under ...

Page 33

PM6670AS 7.1.7 Power-Good signal The PG pin is an open drain output used to monitor output voltage through VSNS (in fixed output voltage mode) or MODE (in adjustable output voltage mode) pins and is enabled after the soft-start timer has ...

Page 34

Device description Figure 38. Fast discharge and soft discharge options VDDQ VDDQ VTT VTT 400mV 400mV 7.1.9 Gate drivers The integrated high-current gate drivers allow using different power MOSFETs. The high- side driver uses a bootstrap circuit which is supplied ...

Page 35

PM6670AS 7.1.11 Over voltage and under voltage protections When the switching output voltage is about 115% of its nominal value, a latched over- voltage protection (OVP) occurs. In this case the synchronous rectifier immediately turns on while the high-side MOSFET ...

Page 36

Device description 7.2 VTTREF buffered reference and VTT LDO section The PM6670AS provides the required DDR2/3 reference voltage on the VTTREF pin. The internal buffer tracks half the voltage on the VSNS pin and has a sink and source capability ...

Page 37

PM6670AS 7.3 S3 and S5 power management pins According to DDR2/3 memories supply requirements, the PM6670AS can manage all system states by connecting S3-S5 pins to their respective sleep-mode signals in the notebook's motherboard. Keeping S3 and ...

Page 38

Application information 8 Application information The purpose of this chapter is to show the design procedure of the switching section. The design starts from three main specifications: ● The input voltage range, provided by the battery or the AC adapter. ...

Page 39

PM6670AS where Equation 27a Equation 27b Referring to the typical application schematic (figure in cover page and expression is then: Equation 28 The switching frequency directly affects two parameters: ● Inductor size: greater frequencies mean smaller inductances. In most of ...

Page 40

Application information 8.1.1 Inductor selection Once the switching frequency has been defined, the inductance value depends on the desired inductor ripple current. Low inductance value means great ripple current that brings poor efficiency and great output noise. On the other ...

Page 41

PM6670AS The saturation current of the inductor should be greater than I saturation core inductors. Using soft-ferrite cores it is possible (but not advisable) to push the inductor working near its saturation current. In Table 13 some inductors are listed. ...

Page 42

Application information It must be taken into account that in some MLCC the capacitance decreases when the operating voltage is near the rated voltage. In applications are listed. Table 14. Evaluated MLCC for input filtering Manufacturer TAIYO YUDEN UMK325BJ106KM-T TAIYO ...

Page 43

PM6670AS If ceramic capacitors are used, the output voltage ripple due to inductor current ripple is negligible. Then the inductance could be smaller, reducing the size of the choke. In this case it is important that output capacitor can adsorb ...

Page 44

Application information where R is the drain-source on-resistance of the control MOSFET. DSon Switching losses are approximately given by: Equation 41 P switching where t and t ON OFF gate-driver current capability and the gate charge Q low R . ...

Page 45

PM6670AS Tested low-side MOSFETs are listed in Table 17. Evaluated low-side MOSFETs Manufacturer ST STS12NH3LL ST STS25NH3LL IR Dual N-MOS can be used in applications with lower output current. Table 18 shows some suitable dual MOSFETs for applications requiring about ...

Page 46

Application information 8.1.6 VDDQ current limit setting The valley current limit is set by R current. The valley of the inductor current I Equation 45 The output current limit depends on the current ripple as shown I Figure 39. Valley ...

Page 47

PM6670AS 8.1.7 All ceramic capacitors application Design of external feedback network depends on the output voltage ripple across the output capacitors' ESR. If the ripple is great enough (at least 20 mV), the compensation network simply consists ...

Page 48

Application information If the ripple on pin COMP is greater than the integrator output dynamic (150 mV), an additional capacitor C attenuation factor of the output ripple, select: Equation 50 In order to reduce noise on pin COMP, it's possible ...

Page 49

PM6670AS Select C as shown: Equation 52 Then calculate R in order to have enough ripple voltage on the integrator input: Equation 53 Where R is the new virtual output capacitor ESR. A good trade-off is to consider an VESR ...

Page 50

Package mechanical data 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...

Page 51

PM6670AS Figure 42. Package dimensions Doc ID 14436 Rev 2 Package mechanical data 51/53 ...

Page 52

Revision history 10 Revision history Table 21. Document revision history Date 14-Feb-2008 17-Feb-2010 52/53 Revision 1 Initial release. Updated: Coverpage, 2 Table 8 Doc ID 14436 Rev 2 Changes Table 2, Table 6, Section 7.1, Figure 28 PM6670AS and ...

Page 53

... PM6670AS Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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