MAX1448EVKIT Maxim Integrated Products, MAX1448EVKIT Datasheet - Page 18

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MAX1448EVKIT

Manufacturer Part Number
MAX1448EVKIT
Description
EVAL KIT FOR MAX1448
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX1448EVKIT

Number Of Adc's
1
Number Of Bits
10
Sampling Rate (per Second)
80M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
±1 V
Power (typ) @ Conditions
120mW @ 80MSPS
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
MAX1448
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX1448 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, preferably on the same side as
the ADC, using surface-mount devices for minimum
inductance. Bypass V
two parallel 0.1µF ceramic capacitors and a 2.2µF
bipolar capacitor to GND. Follow the same rules to
bypass the digital supply (OV
boards with separated ground and power planes pro-
duce the highest level of signal integrity. Consider
using a split ground plane arranged to match the physi-
cal location of the analog ground (GND) and the digital
output driver ground (OGND) on the ADC's package.
The two ground planes should be joined at a single
point so that the noisy digital ground currents do not
interfere with the analog ground plane. The ideal loca-
tion of this connection can be determined experimen-
tally at a point along the gap between the two ground
planes that produces optimum results. Make this con-
nection with a low-value, surface-mount resistor (1Ω to
5Ω), a ferrite bead, or a direct short. Alternatively, all
ground pins could share the same ground plane if the
ground plane is sufficiently isolated from any noisy, dig-
ital systems ground plane (e.g., downstream output
buffer or DSP ground plane). Route high-speed digital
signal traces away from sensitive analog traces. Keep
all signal lines short and free of 90° turns.
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best straight-line fit or a line
drawn between the endpoints of the transfer function
once offset and gain errors have been nullified. The
MAX1448’s static linearity parameters are measured
using the best straight-line fit method.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
18
______________________________________________________________________________________
Static Parameter Definitions
Grounding, Bypassing,
DD
, REFP, REFN, and COM with
and Board Layout
Differential Nonlinearity
DD
) to OGND. Multilayer
Integral Nonlinearity
Figure 12 depicts the aperture jitter (t
sample-to-sample variation in the aperture delay.
Aperture delay (t
falling edge of the sampling clock and the instant when
an actual sample is taken (Figure 12).
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error). The ideal, theoretical
minimum A/D noise is caused by quantization error only
and results directly from the ADC’s resolution (N bits):
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
SINAD is computed by taking the ratio of the RMS sig-
nal to all spectral components minus the fundamental
and the DC offset.
ENOB specifies the dynamic performance of an ADC at
a specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. ENOB
is computed from:
THD is typically the ratio of the RMS sum of the input
signal’s first five harmonics to the fundamental itself.
This is expressed as:
where V
V
harmonics.
5
are the amplitudes of the 2nd- through 5th-order
THD
1
is the fundamental amplitude, and V
=
SNR
20
ENOB
Signal-to-Noise Plus Distortion (SINAD)
Dynamic Parameter Definitions
×
(MAX)
log
AD
=
) is the time defined between the
Effective Number of Bits (ENOB)
Total Harmonic Distortion (THD)
= (6.02 x N + 1.76)dB
(
SINAD
(
V
Signal-to-Noise Ratio (SNR)
2
2
+
6 02
.
V
− 1 76
3
2
V
+
1
.
V
4
2
)
AJ
Aperture Delay
+
Aperture Jitter
), which is the
V
5
2
)
2
through

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