CDB53L21 Cirrus Logic Inc, CDB53L21 Datasheet - Page 46

• Manufacturer Part Number: CDB53L21
• Description: BOARD EVAL FOR CS53L21 ADC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB53L21

• Number Of Adc's: 2
• Number Of Bits: 24
• Sampling Rate (per Second): 96k
• Data Interface: Serial
• Inputs Per Adc: 3 Single Ended
• Input Range: ±2.5 V
• Power (typ) @ Conditions: 22.45mW @ 48kSPS, 2.5 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS53L21
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1550

46
ADCX High-Pass Filter Freeze (ADCX_HPFRZ)
Default: 0
0 - Continuous DC Subtraction
1 - Frozen DC Subtraction
Function:
The high-pass filter works by continuously subtracting a measure of the DC offset from the output of the
decimation filter. If the ADCx_HPFRZ bit is taken high during normal operation, the current value of the DC
offset is frozen, and this DC offset will continue to be subtracted from the conversion result. For DC mea-
surements, this bit must be set to ‘1’. See
Soft Ramp CHX Control (SOFTX)
Default: 0
0 - Disabled
1 - Enabled
Function:
Soft Ramp allows level changes to be implemented via an incremental ramp. ADCx_ATT[7:0] digital atten-
uation changes are ramped from the current level to the new level at a rate of 0.125 dB per LRCK period.
PGAx_VOL[4:0] gain changes are ramped in 0.5 dB steps every 16 LRCK periods.
Soft Ramp & Zero Cross Enabled
When used in conjunction with the ZCROSSx bit, the PGAx_VOL[4:0] gain changes will occur in 0.5 dB
steps and be implemented on a signal zero crossing.
Zero Cross CHX Control (ZCROSSX)
Default: 0
0 - Disabled
1 - Enabled
Function:
Zero Cross Enable dictates that signal level changes will occur on a signal zero crossing to minimize audible
artifacts. The requested level change will occur after a timeout period of 1024 sample periods (approximate-
ly 10.7 ms at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross function
is independently monitored and implemented for each channel.
Soft Ramp & Zero Cross Enabled
When used in conjunction with the SOFTx bit, the PGAx_VOL[4:0] gain changes will occur in 0.5 dB steps
and be implemented on a signal zero crossing.
The ADC Attenuator ADCx_ATT[7:0] is not affected by the ZCROSSx bit.
SOFTx
0
0
1
1
ZCROSSx
0
1
0
1
Volume changes immediately.
Volume changes at next zero cross time.
Volume changes in 0.5 dB steps.
Volume changes in 0.5 dB steps at every
signal zero-cross.
Analog PGA Volume
(PGAx_VOL[4:0])
“ADC Digital Filter Characteristics” on page
Volume changes immediately.
Volume changes immediately.
Change volume in 0.125 dB steps.
Change volume in 0.125 dB steps.
Digital Attenuator (ADCx_ATT[7:0])
14.
CS53L21
DS700PP1