CDB53L21 Cirrus Logic Inc, CDB53L21 Datasheet - Page 27

• Manufacturer Part Number: CDB53L21
• Description: BOARD EVAL FOR CS53L21 ADC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB53L21

• Number Of Adc's: 2
• Number Of Bits: 24
• Sampling Rate (per Second): 96k
• Data Interface: Serial
• Inputs Per Adc: 3 Single Ended
• Input Range: ±2.5 V
• Power (typ) @ Conditions: 22.45mW @ 48kSPS, 2.5 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS53L21
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1550

DS700PP1
4.3.8
Noise Gate
The noise gate may be used to mute signal levels that fall below a programmable threshold. This prevents
the ALC from applying gain to noise. A programmable delay may be used to set the minimum time before
the noise gate attacks the signal.
Maximum noise gate attenuation levels will depend on the gain applied in either the PGA or MIC pre-am-
plifier. For example: If both +32 dB pre-amplification and +12 dB programmable gain is applied, the max-
imum attenuation that the noise gate achieves will be 52 dB (-96 + 32 + 12) below full-scale.
Ramp-down time to the maximum setting is affected by the SOFTx bit.
Recommended settings: For best results, enable soft ramp for the digital attenuator. When the analog in-
puts are configured for differential signals (see
page
Software
Controls:
23), enable the NG_ALL bit to trigger the noise gate only when both inputs fall below the threshold.
“Noise Gate Configuration & Misc. (Address 1Fh)” on page
page
45.
Output
(dB)
-96
Figure 11. Noise Gate Attenuation
THRESH[2:0]
“Differential Inputs” on page 23“Differential Inputs” on
-40
-52 dB
-64 dB
-80 dB
Input (dB)
54,
“ADC Control (Address 06h)” on
CS53L21
27