EVAL-AD7714-3EBZ Analog Devices Inc, EVAL-AD7714-3EBZ Datasheet - Page 4

• Manufacturer Part Number: EVAL-AD7714-3EBZ
• Description: BOARD EVALUATION FOR AD7714
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD7714-3EBZ

• Number Of Adc's: 1
• Number Of Bits: 24
• Sampling Rate (per Second): 1k
• Data Interface: Serial
• Inputs Per Adc: 3 Differential
• Input Range: 0 ~ 3.3 V
• Power (typ) @ Conditions: 3.65mW @ 3.3 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7714-3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EVAL-AD7714-3EB
1
2
3
4
5
6
7-8
9
10
11-12
13
14-18
19-30
31-36
NC
DIN
RESET
CS
SCLK
SYNC
NC
DV
DRDY
NC
DOUT
NC
DGND
NC
DD
36
18
No Connect. This pin is not connected on the evaluation board.
Serial Data Input. Data applied to this pin is buffered and level-shifted from 5V to 3V before being applied to
the AD7714's DIN pin. The serial data applied to the DIN pin is written to the input shift register on the part.
Data from this input shift register is transferred to the calibration registers, mode register, communications
register or filter selection registers depending on the register selection bits of the Communications Register.
Reset Input. The signal on this pin is buffered and level-shifted from 5V to 3V before being applied to the
RESET pin of the AD7714. RESET is an active low input which resets the control logic, interface logic,
calibration coefficients, digital filter and analog modulator of the part to power-on status.
Chip Select. The signal on this pin is buffered and level-shifted from 5V to 3V before being applied to the CS
pin of the AD7714. CS is an active low logic input used to select the AD7714. With this input hard-wired
low, the AD7714 operates in its three-wire interface mode with SCLK, DIN and DOUT used to interface to
the device. CS can be used to select the device in systems with more than one device on the serial bus or as a
frame synchronisation signal in communicating with the AD7714.
Serial Clock. The signal on this pin is buffered and level-shifted from 5V to 3V before being applied to the
SCLK pin of the AD7714. An external serial clock is applied to this input to access serial data from the
AD7714. This serial clock can be a continuous clock with all data transmitted in a continuous train of pulses.
Alternatively, it can be a non-continuous clock with the information being transmitted to the AD7714 in
smaller batches of data.
Logic Input. The signal on this pin is buffered and level-shifted from 5V to 3V before being applied to the
SYNC pin of the AD7714. The SYNC input allows for synchronisation of the digital filters and analog
modulators across a number of AD7714s. While SYNC is low, the nodes of the digital filter, the filter control
logic and the calibration control logic are reset and the analog modulator is also held in its reset state.
No Connect. These pins are not connected on the evaluation board.
Digital Supply Voltage. This provides the supply voltage for IC4, the buffer chip which buffers the output sig-
nals from the AD7714 before they are applied to SKT11.
Logic output. This is a buffered version of the signal on the AD7714's DRDY pin. A logic low on the DRDY
output indicates that a new output word is available from the AD7714 data register. The DRDY pin will re-
turn high upon completion of a read operation of a full output word. If no data read has taken place, after an
output update, the DRDY line will return high for 500* t
gives an indication of when a read operation should not be attempted to avoid reading from the data register
as it is being updated. DRDY is also used to indicate when the AD7714 has completed its on-chip calibration
sequence.
No Connect. These pins are not connected on the evaluation board.
Serial Data Output. This is a buffered version of the signal on the AD7714's DOUT pin. Serial data from the
output shift register on the part is clocked out on this pin. This output shift register can contain information
from the calibration registers, mode register, communications register, filter selection registers or data register
depending on the register selection bits of the Communications Register.
No Connect. These pins are not connected on the evaluation board.
Ground reference point for digital circuitry. Connects to the DGND plane on the evaluation board.
No Connect. These pins are not connected on the evaluation board.
Table III. SKT11 Pin Designations
Figure 3. SKT11 Pin Configuration
–4–
CLK IN
cycles prior to the next output update. This
19
1
REV. A