SI5319-EVB Silicon Laboratories Inc, SI5319-EVB Datasheet - Page 6

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SI5319-EVB

Manufacturer Part Number
SI5319-EVB
Description
BOARD EVALUATION SI5319
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5319-EVB

Main Purpose
Timing, Clock Multiplier
Embedded
No
Utilized Ic / Part
SI5319
Primary Attributes
1 Input, 1 Output
Secondary Attributes
CML, CMOS, LVDS, LVPECL
Processor To Be Evaluated
Si5319
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Si531x-EVB
Si532x-EVB
This evaluation board requires two power inputs +3.3 V for the MCU and either 1.8, 2.5, or 3.3 V for the Any-Rate
Precision Clock part. The power connector is J30. The grounds for the two supplies are tied together on the EVB.
There are eight LEDs, as described in Table 3.
The Evaluation board has a serial port connector (J17) that supports the following:
For details, see J17 (Table 5).
Though they are not needed on this Evaluation Board because the CPLD has low output leakage current, some
applications will require the use of external pullup and pulldown resistors when three level pins are being driven by
external logic drivers. This is particularly true for the pin-controlled parts: the Si5316, Si5322 and Si5323. Consult
the Si53xx-RM Any-Rate Precision Clock Family Reference Manual for details.
5.6. MCU
The MCU is responsible for connecting the evaluation board to the PC so that PC resident software can be used to
control and monitor the Si532x. The USB connector is J3 and the debug port, by which the MCU is flashed, is J24.
The reset switch, SW1, resets the MCU, but not the CPLD. The MCU is a self-contained USB master and runs all
of the code required to control and monitor the Si532x, both in the MCU mode and in the pin-controlled modes.
U4 contains a unique serial number for each board and U3 is an EEPROM that is used to store configuration
information for the board. The board powers up in free run mode with a configuration that is outlined in "Appendix—
Powerup and Factory Default Settings" on page 23.
For the pin controlled parts (Si5316-EVB and Si5322/23-EVB), the contents of U3 configure the board on powerup
so that jumper plugs may be used.
If DSPLLsim is subsequently run, the jumper plugs should be removed before DSPLLsim downloads the
configuration to the EVB so that the jumpers do not conflict with the CPLD outputs.
For microprocessor parts, U3 configures the EVB for a specific frequency plan as described in "Appendix—
Powerup and Factory Default Settings" on page 23.
LVPECL outputs will not function at 1.8 V. If the Si532x part is to be operate at 1.8 V, the output format
needs to be changed by altering either the SFOUT pins (Si5316/22/23) or the SFOUT register bits (Si5319/
25/26).
6
Control by the MCU/CPLD of an Any-Rate part on an external target board.
Control of the Any-Rate part that is on the Eval board through an external SPI or I
+3.3 V
MCU
Figure 3. SPI Mode Serial Data Flow
SS_CPLD_B
SCLK
MOSI
MISO
Rev. 0.4
CPLD
SCLK
SS_B
SDO
SDI
Si5325, Si5326
DUT_PWR
2
C port.

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