APTH003A0X4-SRZ Lineage Power, APTH003A0X4-SRZ Datasheet - Page 15

DC-DC 0.6-3.63V @ 3A

APTH003A0X4-SRZ

Manufacturer Part Number
APTH003A0X4-SRZ
Description
DC-DC 0.6-3.63V @ 3A
Manufacturer
Lineage Power
Series
Pico TLynx™r
Type
Point of Load (POL) Non-Isolated with Remote On/Offr
Datasheet

Specifications of APTH003A0X4-SRZ

Output
0.6 ~ 3.63V
Number Of Outputs
1
Power (watts)
10W
Mounting Type
Surface Mount
Voltage - Input
2.4 ~ 5.5V
Package / Case
10-SMD Module
1st Output
0.6 ~ 3.63 VDC @ 3A
Size / Dimension
0.48" L x 0.48" W x 0.25" H (12.2mm x 12.2mm x 6.3mm)
Power (watts) - Rated
10W
Operating Temperature
-40°C ~ 85°C
Efficiency
94%
Approvals
CSA, EN, UL, VDE
Product
Non-Isolated / POL
Output Power
11 W
Input Voltage Range
2.4 V to 5.5 V
Output Voltage (channel 1)
0.6 V to 3.63 V
Output Current (channel 1)
3 A
Output Type
Non-Isolated
Output Voltage
0.6 V to 3.63 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-
2nd Output
-
Lead Free Status / Rohs Status
 Details
Data Sheet
April 7, 2011
voltage on the SEQ pin on a one-to-one volt basis. By
connecting the SEQ pins of multiple modules together,
all modules can track their output voltages to the
voltage applied on the SEQ pin.
For proper voltage sequencing, first, input voltage is
applied to the module. The On/Off pin of the module is
left unconnected (or tied to GND for negative logic
modules or tied to V
that the module is ON by default. After applying input
voltage to the module, a minimum 10msec delay is
required before applying voltage on the SEQ pin. This
delay gives the module enough time to complete its
internal power-up soft-start cycle. During the delay
time, the SEQ pin should be held close to ground
(nominally 50mV ± 20 mV). This is required to keep the
internal op-amp out of saturation thus preventing
output overshoot during the start of the sequencing
ramp. By selecting resistor R1 (see fig. 43) according
to the following equation
the voltage at the sequencing pin will be 50mV when
the sequencing signal is at zero.
Figure 43. Circuit showing connection of the
sequencing signal to the SEQ pin.
After the 10msec delay, an analog voltage is applied to
the SEQ pin and the output voltage of the module will
track this voltage on a one-to-one volt bases until the
output reaches the set-point voltage. To initiate
simultaneous shutdown of the modules, the SEQ pin
voltage is lowered in a controlled manner. The output
voltage of the modules tracks the voltages below their
set-point voltages on a one-to-one basis. A valid input
voltage must be maintained until the tracking and
output voltages reach ground potential.
When using the EZ-SEQUENCE
start-up of the module, pre-bias immunity during start-
LINEAGE
VIN+
SEQ
GND
POWER
R1
R
1
=
IN
V
499K
for positive logic modules) so
IN
24950
10K
. 0
MODULE
05
TM
ohms,
2.4 – 5.5Vdc input; 0.6Vdc to 3.63Vdc output; 3A output current
feature to control
+
-
OUT
Pico TLynx
TM
up is disabled. The pre-bias immunity feature of the
module relies on the module being in the diode-mode
during start-up. When using the EZ-SEQUENCE
feature, modules goes through an internal set-up time
of 10msec, and will be in synchronous rectification
mode when the voltage at the SEQ pin is applied. This
will result in the module sinking current if a pre-bias
voltage is present at the output of the module. When
pre-bias immunity during start-up is required, the EZ-
SEQUENCE
additional guidelines on using the EZ-SEQUENCE
feature please refer to Application Note AN04-008
“Application Guidelines for Non-Isolated Converters:
Guidelines for Sequencing of Multiple Modules”, or
contact the Lineage Power technical representative for
additional information.
Tunable Loop
The 5V Pico TLynx
that optimizes transient response of the module called
Tunable Loop
External capacitors are usually added to the output of
the module for two reasons: to reduce output ripple
and noise (see Figures 36 and 37) and to reduce
output voltage deviations from the steady-state value
in the presence of dynamic load current changes.
Adding external capacitance however affects the
voltage control loop of the module, typically causing
the loop to slow down with sluggish response. Larger
values of external capacitance could also cause the
module to become unstable.
The Tunable Loop
adjust the voltage control loop to match the filter
network connected to the output of the module. The
Tunable Loop is implemented by connecting a series
R-C between the SENSE and TRIM pins of the
module, as shown in Fig. 44. This R-C allows the user
to externally adjust the voltage loop feedback
compensation of the module.
Figure. 44. Circuit diagram showing connection of
R
module.
3A: Non-isolated DC-DC Power Modules
TUME
and C
MODULE
TM
TUNE
GND
TM
feature must be disabled. For
.
SENSE
to tune the control loop of the
TM
VOUT
TM
TRIM
allows the user to externally
3A modules have a new feature
RTUNE
CTUNE
RTrim
C O
15
TM
TM

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