DS1996L-F5+ Maxim Integrated Products, DS1996L-F5+ Datasheet - Page 6

IBUTTON MEMORY 64KBit F5

DS1996L-F5+

Manufacturer Part Number
DS1996L-F5+
Description
IBUTTON MEMORY 64KBit F5
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1996L-F5+

Rohs Information
IButton RoHS Compliance Plan
Memory Size
8KB
Memory Type
NVRAM
Data Bus Width
64 bit
Interface Type
1-Wire
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
F5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS1996
Write Scratchpad Command [0FH]
After issuing the write scratchpad command, the master must first provide the 2-byte target address,
followed by the data to be written to the scratchpad. The data will be written to the scratchpad starting at
the byte offset (T4:T0). The ending offset (E4: E0) will be the byte offset at which the bus master has
stopped writing data.
Read Scratchpad Command [AAH]
This command is used to verify scratchpad data and target address. After issuing the read scratchpad
command, the master begins reading. The first 2 bytes will be the target address. The next byte will be the
ending offset/data status byte (E/S) followed by the scratchpad data beginning at the byte offset (T4: T0).
The master may read data until the end of the scratchpad after which the data read will be all logic 1’s.
DS1996 MEMORY MAP Figure 5
ADDRESS REGISTERS Figure 6
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