HCPL-5121-100 Avago Technologies US Inc., HCPL-5121-100 Datasheet - Page 14

ISOLAT 1.5KVDC 1CH TOTEM 8SMD BJ

HCPL-5121-100

Manufacturer Part Number
HCPL-5121-100
Description
ISOLAT 1.5KVDC 1CH TOTEM 8SMD BJ
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HCPL-5121-100

Output Type
Push-Pull, Totem-Pole
Package / Case
8-SMD Butt Joint
Voltage - Isolation
1500VDC
Number Of Channels
1, Unidirectional
Current - Output / Channel
2A
Propagation Delay High - Low @ If
300ns @ 10mA ~ 18mA
Current - Dc Forward (if)
25mA
Input Type
DC
Mounting Type
Surface Mount
Configuration
1 Channel
Maximum Propagation Delay Time
500 ns
Maximum Forward Diode Voltage
1.8 V
Minimum Forward Diode Voltage
1.2 V
Maximum Reverse Diode Voltage
5 V
Maximum Forward Diode Current
18 mA
Maximum Power Dissipation
295 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Number Of Elements
1
Forward Voltage
1.8V
Forward Current
25mA
Package Type
PDIP
Operating Temp Range
-55C to 125C
Power Dissipation
295mW
Propagation Delay Time
500ns
Pin Count
8
Mounting
Surface Mount
Reverse Breakdown Voltage
5V
Operating Temperature Classification
Military
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
CMR with the LED On (CMR
A high CMR LED drive circuit must keep the LED on dur-
ing common mode transients. This is achieved by over-
driving the LED current beyond the input threshold so
that it is not pulled below the threshold during a tran-
sient. A minimum LED current of 0 mA provides ade-
quate margin over the maximum I
0 kV/µs CMR.
Figure 30. Equivalent Circuit for Figure 25 During Common Mode Transient.
Figure 31. Not Recommended Open Collector Drive Circuit
4
+5 V
+5 V
Q1
V
+
_
SAT
1
2
3
4
* THE ARROWS INDICATE THE DIRECTION
OF CURRENT FLOW DURING ∆dV CM /dt
1
2
3
4
C
C
I
LEDN
LEDP
LEDN
C
C
SHIELD
I
LEDP
LEDN
LEDP
SHIELD
V CM
+
H
).
_
FLH
of  mA to achieve
8
7
6
5
8
7
6
5
0.1
µF
+
_
Rg
V CC = 18 V
CMR with the LED Off (CMR
A high CMR LED drive circuit must keep the LED off (V
≤ V
during a -dV
ing through C
the logic gate. As long as the low state voltage devel-
oped across the logic gate is less than V
remain off and no common mode failure will occur.
The open collector drive circuit, shown in Figure 3, can-
not keep the LED off during a +dV
all the current flowing through C
by the LED, and it is not recommended for applications
requiring ultra high CMR
alternative drive circuit which, like the recommended
application circuit (Figure 25), does achieve ultra high
CMR performance by shunting the LED in the off state.
Figure 32. Recommended LED Drive Circuit for Ultra-High CMR
* * *
* * *
+5 V
F(OFF)
) during common mode transients. For example,
1
2
3
4
cm
/dt transient in Figure 30, the current flow-
LEDP
C
C
LEDP
LEDN
also flows through the R
SHIELD
L
L
).
performance. Figure 32 is an
LEDN
cm
8
7
6
5
/dt transient, since
must be supplied
F(OFF)
SAT
, the LED will
and V
SAT
of
F

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