KSZ8995MA Micrel Inc, KSZ8995MA Datasheet - Page 46

• Manufacturer Part Number: KSZ8995MA
• Description: IC SWITCH 10/100 5PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8995MA

• Data Rate: 100Mbps
• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 5
• Ethernet Type: IEEE 802.3u
• Supply Voltage Range: 1.7V To 1.9V, 3.15V To 3.45V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of Pins: 128
• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Interface Type: MII, SNI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1607 - BOARD EVAL EXPERIMENT KSZ8995MA
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1039

KS8995MA
Note:
Registers 19 and 20 (and those corresponding to other ports) serve two purposes: (1) associated with the ingress untagged packets, and used for egress
tagging; (2) default VID for the ingress untagged or null-VID-tagged packets, and used for address look-up.
M9999-051305
Register 19 (0x13): Port 1 Control 3
Register 35 (0x23): Port 2 Control 3
Register 51 (0x33): Port 3 Control 3
Register 67 (0x43): Port 4 Control 3
Register 83 (0x53): Port 5 Control 3
Address
7-0
Register 20 (0x14): Port 1 Control 4
Register 36 (0x24): Port 2 Control 4
Register 52 (0x34): Port 3 Control 4
Register 68 (0x44): Port 4 Control 4
Register 84 (0x54): Port 5 Control 4
Address
7-0
Register 21 (0x15): Port 1 Control 5
Register 37 (0x25): Port 2 Control 5
Register 53 (0x35): Port 3 Control 5
Register 69 (0x45): Port 4 Control 5
Register 85 (0x55): Port 5 Control 5
Address
7-0
Register 22 (0x16): Port 1 Control 6
Register 38 (0x26): Port 2 Control 6
Register 54 (0x36): Port 3 Control 6
Register 70 (0x46): Port 4 Control 6
Register 86 (0x56): Port 5 Control 6
Address
7-0
Register 23 (0x17): Port 1 Control 7
Register 39 (0x27): Port 2 Control 7
Register 55 (0x37): Port 3 Control 7
Register 71 (0x47): Port 4 Control 7
Register 87 (0x57): Port 5 Control 7
Address
7-4
3-0
Name
Default Tag [15:8]
Name
Default Tag [7:0]
Name
Transmit High Priority
Rate Control [7:0]
Name
Transmit Low Priority
Rate Control [7:0]
Name
Transmit Low Priority
Rate Control [11:8]
Transmit High Priority
Rate Control [11:8]
Description
Port’s default tag, containing:
7-5: user priority bits
4: CFI bit
3-0 : VID[11:8]
Description
Default port 1’s tag, containing:
7-0: VID[7:0]
Description
This along with port control 7, bits [3:0] form a 12-bit
field to determine how many “32Kbps” high priority
blocks can be transmitted (in a unit of 4K bytes in a
one second period).
Description
This along with port control 7, bits [7:4] form a 12-bit
field to determine how many “32Kbps” low priority
blocks can be transmitted (in a unit of 4K bytes in a
one second period).
Description
This along with port control 6, bits [7:0] form a 12-bit
field to determine how many “32Kbps” low priority
blocks can be transmitted (in a unit of 4K bytes in a
one second period).
This along with port control 5, bits [7:0] form a 12-bit
field to determine how many “32Kbps” high priority
blocks can be transmitted (in unit of 4K bytes in a
one second period).
46
Mode
R/W
Mode
R/W
Mode
R/W
Mode
R/W
Mode
R/W
R/W
Default
0
Default
1
Default
0
Default
0
Default
0
0
Micrel, Inc.
May 2005