KSZ8995MA Micrel Inc, KSZ8995MA Datasheet - Page 19

• Manufacturer Part Number: KSZ8995MA
• Description: IC SWITCH 10/100 5PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8995MA

• Data Rate: 100Mbps
• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 5
• Ethernet Type: IEEE 802.3u
• Supply Voltage Range: 1.7V To 1.9V, 3.15V To 3.45V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of Pins: 128
• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Interface Type: MII, SNI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1607 - BOARD EVAL EXPERIMENT KSZ8995MA
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1039

Note:
1. P = Power supply.
May 2005
KS8995MA
Pin Number
I = Input.
O = Output.
I/O = Bidirectional.
Gnd = Ground.
Ipu = Input w/ internal pull-up.
Ipd = Input w/ internal pull-down.
Ipd/O = Input w/ internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/ internal pull-up during reset, output pin otherwise.
Otri = Output tristated.
NC = No connect.
110
111
109
112
128
118
123
125
14
23
29
36
13
22
28
35
41
43
15
31
18
24
37
50
8
7
3
9
SPID/SDA
Pin Name
SPIC/SCL
TESTEN
SPIS_N
VDDAP
VDDAR
VDDAR
VDDAR
VDDAR
VDDAR
VDDAR
VDDAT
VDDAT
VDDAT
VDDAT
TEST2
VDDC
TXM1
TXM2
TXM3
TXM4
TXM5
TXP1
TXP2
TXP3
TXP4
TXP5
SPIQ
Type
Otri
Ipu
NC
Ipd
I/O
I/O
O
O
O
O
O
O
O
O
O
O
P
P
P
P
P
P
P
P
P
P
P
P
(1)
Port
All
All
All
All
1
2
3
4
5
1
2
3
4
5
Pin Function
(1) Input clock up to 5MHz in SPI slave mode; (2) Output clock at 81kHz
in I
(1) Serial data input in SPI slave mode; (2) Serial data input/output in
I
(1) SPI serial data output in SPI slave mode; (2) Not used in I
mode. See “Pin 113.”
Active low. (1) SPI data transfer start in SPI slave mode. When SPIS_N
is high, the KS8995MA is deselected and SPIQ is held in high
impedance state, a high-to-low transition to initiate the SPI data
transfer; (2) Not used in I
No connect for normal operation. Factory test pin.
No connect for normal operation. Factory test pin.
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal – (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
Physical transmit signal + (differential).
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
1.8V analog V
2.5V or 3.3V analog V
2.5V or 3.3V analog V
2.5V or 3.3V analog V
2.5V or 3.3V analog V
1.8V digital core V
2
C master mode. See “Pin 113.”
2
C master mode. See “Pin 113.”
19
DD
DD
DD
DD
DD
DD
DD
.
.
.
.
.
.
for PLL.
DD
.
DD
DD
DD
DD
.
.
.
.
2
C master mode.
2
M9999-051305
C master
Micrel, Inc.