LTC1628IG-PG Linear Technology, LTC1628IG-PG Datasheet - Page 16

• Manufacturer Part Number: LTC1628IG-PG
• Description: IC REG SW 2PHASE STEPDOWN 28SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1628IG-PG

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: Adj to 0.8V
• Current - Output: 3A
• Frequency - Switching: 220kHz
• Voltage - Input: 3.5 ~ 30 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
LTC1628/LTC1628-PG
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used as
input capacitors, but each has drawbacks: ceramic voltage
coefficients are very high and may have audible piezoelec-
tric effects; tantalums need to be surge-rated; OS-CONs
suffer from higher inductance, larger case size and limited
surface-mount applicability; electrolytics’ higher ESR and
dryout possibility require several to be used. Multiphase
systems allow the lowest amount of capacitance overall.
As little as one 22 F or two to three 10 F ceramic capaci-
tors are an ideal choice in a 20W to 35W power supply due
to their extremely low ESR. Even though the capacitance
at 20V is substantially below their rating at zero-bias, very
low ESR loss makes ceramics an ideal candidate for
highest efficiency battery operated systems. Also con-
sider parallel ceramic and high quality electrolytic capaci-
tors as an effective means of achieving ESR and bulk
capacitance goals.
In continuous mode, the source current of the top N-chan-
nel MOSFET is a square wave of duty cycle V
prevent large voltage transients, a low ESR input capacitor
sized for the maximum RMS current of one channel must
be used. The maximum RMS capacitor current is given by:
This formula has a maximum at V
I
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question.
The benefit of the LTC1628 multiphase can be calculated
by using the equation above for the higher power control-
ler and then calculating the loss that would have resulted
if both controller channels switch on at the same time. The
total RMS power lost is lower when both controllers are
16
RMS
C
IN
= I
Re
OUT
quiredI
/2. This simple worst case condition is com-
RMS
U
I
MAX
U
V
OUT
W
V
IN
IN
V
= 2V
IN
V
OUT
OUT
OUT
U
/V
, where
/ 1 2
IN
. To
operating due to the interleaving of current pulses through
the input capacitor’s ESR. This is why the input capacitor’s
requirement calculated above for the worst-case control-
ler is adequate for the dual controller design. Remember
that input protection fuse resistance, battery resistance
and PC board trace resistance losses are also reduced due
to the reduced peak currents in a multiphase system. The
overall benefit of a multiphase design will only be fully
realized when the source impedance of the power supply/
battery is included in the efficiency testing. The drains of
the two top MOSFETS should be placed within 1cm of each
other and share a common C
and C
resonances at V
The selection of C
series resistance (ESR). Typically once the ESR require-
ment is satisfied the capacitance is adequate for filtering.
The output ripple ( V
Where f = operating frequency, C
and I
is highest at maximum input voltage since I
with input voltage. With I
ripple will typically be less than 50mV at max V
ing:
The first condition relates to the ripple current into the ESR
of the output capacitance while the second term guaran-
tees that the output capacitance does not significantly
discharge during the operating frequency period due to
ripple current. The choice of using smaller output capaci-
tance increases the ripple voltage due to the discharging
term but can be compensated for by using capacitors of
very low ESR to maintain the ripple voltage at or below
50mV. The I
nents can be optimized to provide stable, high perfor-
mance transient response regardless of the output capaci-
tors selected.
C
and C
OUT
V
OUT
IN
L
= ripple current in the inductor. The output ripple
Recommended ESR < 2 R
OUT
may produce undesirable voltage and current
> 1/(8fR
TH
I ESR
L
IN
pin OPTI-LOOP compensation compo-
.
OUT
SENSE
OUT
is driven by the required effective
8
) is determined by:
fC
)
1
OUT
L
IN
= 0.3I
(s). Separating the drains
OUT
SENSE
= output capacitance,
OUT(MAX)
L
the output
IN
increases
assum-
1628fb