NCP1397BDR2G ON Semiconductor, NCP1397BDR2G Datasheet - Page 17

• Manufacturer Part Number: NCP1397BDR2G
• Description: IC CTLR RESONANT HI PERF 16-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1397BDR2G

• Pwm Type: Controller
• Number Of Outputs: 1
• Frequency - Max: 560kHz
• Duty Cycle: 52%
• Voltage - Supply: 10.3 V ~ 20 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-SOIC (3.9mm Width, 15 Leads)
• Frequency-max: 560kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Soft−Start Sequence
suddenly applying the full current into the resonating circuit.
With this controller the soft−start duration is fully adjustable
using eternal components. The purpose of the Soft−Start pin
is to discharge Soft−Start capacitor before IC restart and in
case of fault conditions detected by Fault input.
capacitor (refer to Figure 37) is fully discharged and thus it
starts charging from the Rt pin. The charging current
increases operating frequency of the controller above F
As the soft−start capacitor charges, the frequency smoothly
decreases down to F
loop is supposed to take over the VCO lead as soon as the
output voltage has reached the target. If not, then the
minimum switching frequency is reached and a fault is
detected on the feedback pin (typically below 300 mV).
Figure 38 depicts a typical LLC startup using NCP1397A/B
controller.
In resonant controllers, a soft−start is needed to avoid
Once the controller starts operation, the Soft−Start
Figure 37. Soft−Start Components Arrangement
Fstart(adj) − RFstart/RFmin
Fmin(adj) − RFmin
Fmax(adj) − RFmax
CSS
RF(start)
min
RFmin
RDT
DT
RFmax
. Of course, practically, the feedback
Vref
V
DD
I
dis
Ct
I
F
charge
SW(min)
SS
Fmax
Rt
NCP1397
:
GND
+ F
SW(max)
Figure 36. Dead−time Generation
+
http://onsemi.com
3 V−1 V
+
−
min
.
17
Please note that the soft−start capacitor is discharged in the
following conditions:
− A startup sequence
− During auto−recovery burst mode
− A brown−out recovery
− A temperature shutdown recovery
Since we want to implement skip cycle using this input, we
cannot activate the soft−start every time the feedback pin
stops the operations in low power mode. Therefore, when
the skip/enable pin is released, no soft−start occurs to offer
the best skip cycle behavior. However, it is very possible to
combine skip cycle and true disable, e.g. via ORing diodes
driving Pin 8. In that case, if a signal maintains the
skip/disable input high long enough to bring the feedback
level down (below 0.3 V) since the output voltage starts to
fall down, then the soft−start discharge switch is activated.
Reached
Target is
The skip/disable input undergoes a special treatment.
Figure 38. A Typical Startup Sequence on a LLC
Action
SS
D
Clk
S
R
Converter Using NCP1397
Q
Q
A
B