DS28EA00U+ Maxim Integrated Products, DS28EA00U+ Datasheet - Page 24

• Manufacturer Part Number: DS28EA00U+
• Description: IC THERMOMETER 1-WIRE 8-USOP
• Manufacturer: Maxim Integrated Products

Specifications of DS28EA00U+

• Function: Thermometer, Thermostat
• Topology: Register Bank, Scratchpad
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 85°C
• Output Type: Digital
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1-Wire Digital Thermometer with
Sequence Detect and PIO
For a write-one time slot, the voltage on the data line
must have crossed the V
one low time t
slot, the voltage on the data line must stay below the
V
expired. For the most reliable communication, the volt-
age on the data line should not exceed V
the entire t
has been crossed, the DS28EA00 needs a recovery
time t
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
until the read low time t
window, when responding with a 0, the DS28EA00
starts pulling the data line low; its internal timing gener-
ator determines when this pulldown ends and the volt-
age starts rising again. When responding with a 1, the
DS28EA00 does not hold the data line low at all, and
the voltage starts rising as soon as t
The sum of t
nal timing generator of the DS28EA00 on the other side
define the master sampling window (t
t
the data line. For the most reliable communication, t
should be as short as permissible, and the master
should read close to but no later than t
reading from the data line, the master must wait until
t
t
Note that t
DS28EA00 attached to a 1-Wire line. For multidevice
configurations, t
date the additional 1-Wire device input capacitance.
Alternatively, an interface that performs active pullup dur-
ing the 1-Wire recovery time such as the DS2482-x00 or
DS2480B 1-Wire line drivers can be used.
In a 1-Wire environment, line termination is possible
only during transients controlled by the bus master
(1-Wire driver). 1-Wire networks, therefore, are suscep-
tible to noise of various origins. Depending on the phys-
ical size and topology of the network, reflections from
end points and branch points can add up, or cancel
each other to some extent. Such reflections are visible
as glitches or ringing on the 1-Wire communication line.
Noise coupled onto the 1-Wire line from external
sources can also result in signal glitching. A glitch dur-
ing the rising edge of a time slot can cause a slave
24
MSRMAX
SLOT
REC
TH
threshold until the write-zero low time t
______________________________________________________________________________________
for the DS28EA00 to get ready for the next time slot.
REC
is expired. This guarantees sufficient recovery time
) in which the master must perform a read from
before it is ready for the next time slot.
REC
Improved Network Behavior
W0L
RL
W1LMAX
specified herein applies only to a single
or t
+ δ (rise time) on one side and the inter-
REC
(Switchpoint Hysteresis)
W1L
needs to be extended to accommo-
is expired. For a write-zero time
window. After the V
RL
TH
is expired. During the t
threshold before the write-
RL
Slave-to-Master
is over.
Master-to-Slave
MSRMAX
ILMAX
TH
MSRMIN
W0LMIN
threshold
during
. After
RL
RL
TL
to
is
device to lose synchronization with the master and,
consequently, result in a Search ROM command com-
ing to a dead end or cause a device-specific function
command to abort. For better performance in network
applications, the DS28EA00 uses a new 1-Wire front-
end, which makes it less sensitive to noise and also
reduces the magnitude of noise injected by the slave
device itself.
The 1-Wire front-end of the DS28EA00 differs from tra-
ditional slave devices in four characteristics:
1) The falling edge of the presence pulse has a con-
2) There is additional lowpass filtering in the circuit
3) There is a hysteresis at the low-to-high switching
4) There is a time window specified by the rising edge
Devices that have the parameters V
fied in their electrical characteristics use the improved
1-Wire front-end.
Precondition: The PIOB pin (EN) of the first device in
the chain is at logic 0. The PIOA pin (DONE) of the first
device connects to the PIOB of the second device in
the chain, etc., as shown in Figure 15. The 1-Wire mas-
ter detects the physical sequence of the devices in the
chain by performing the following procedure.
Starting Condition: The master issues a Skip ROM
command followed by a Chain ON command, which
puts all devices in the chain ON state. The pullup
trolled slew rate. This provides a better match to the
line impedance than a digitally switched transistor,
converting the high-frequency ringing known from
traditional devices into a smoother low-bandwidth
transition. The slew-rate control is specified by the
parameter t
dard and overdrive speed.
that detects the falling edge at the beginning of a
time slot. This reduces the sensitivity to high-fre-
quency noise. This additional filtering does not
apply at overdrive speed.
threshold V
does not go below V
(Figure 14, Case A). The hysteresis is effective at
any 1-Wire speed.
hold-off time t
ignored, even if they extend below V
threshold (Figure 14, Case B, t
voltage droops or glitches that appear late after
crossing the V
t
the beginning of a new time slot (Figure 14, Case C,
t
REH
GL
Sequence Discovery Procedure
≥ t
window cannot be filtered out and are taken as
REH
).
TH
FPD
. If a negative glitch crosses V
TH
, which has different values for stan-
REH
threshold and extend beyond the
TH
during which glitches are
- V
HY
, it is not recognized
HY
GL
and t
< t
REH
REH
TH
). Deep
TH
speci-
- V
but
HY