MAX17000ETG+ Maxim Integrated Products, MAX17000ETG+ Datasheet - Page 23

IC PWM CTLR DDR/DDR2/DDR3 24TQFN

MAX17000ETG+

Manufacturer Part Number
MAX17000ETG+
Description
IC PWM CTLR DDR/DDR2/DDR3 24TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Type
DDR2/DDR3 Memory Power-Management Solutionr
Datasheet

Specifications of MAX17000ETG+

Applications
Memory, DDR2/DDR3 Regulator
Current - Supply
2mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TQFN Exposed Pad
Output Voltage Range
1 V to 2.7 V
Input Voltage Range
3 V to 26 V
Input Current
2 mA
Power Dissipation
2222 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
If the output voltage of the SMPS rises 115% above its
nominal regulation voltage while OVP is enabled (OVP
= V
pulls PGOOD1 and PGOOD2 low, and forces DL high.
The VTT and VTTR block shut down immediately, and
the internal 16Ω discharge MOSFETs on CSL and VTT
are turned on. If the condition that caused the overvolt-
age persists (such as a shorted high-side MOSFET),
the battery fuse blows. Cycle V
SHDN to clear the overvoltage fault latch and restart the
controller.
OVP is disabled when OVP is connected to AGND
(Table 4). PGOOD1 upper threshold remains active at
115% of nominal regulation voltage even when OVP is
disabled, and the 16Ω discharge MOSFETs on CSL
and VTT are not enabled in shutdown.
If the output voltage of the SMPS falls below 85% of its
regulation voltage for more than 200µs (typ), the controller
sets its undervoltage fault latch, pulls PGOOD1 and
PGOOD2 low, and begins soft-shutdown pulsing DL. DH
remains off during the soft-shutdown sequence initiated
by an undervoltage fault. After soft-shutdown has com-
pleted, the MAX17000 forces DL and DH low, and
enables the internal 16Ω discharge MOSFETs on CSL
and VTT. Cycle V
the undervoltage fault latch and restart the controller.
If the output voltage of the VTT regulator exceeds
±10% of its regulation voltage for more than 5ms (typ),
the controller sets its fault latch, pulls PGOOD1 and
PGOOD2 low, and begins soft-shutdown pulsing DL.
DH remains off during the soft-shutdown sequence initi-
ated by an undervoltage fault. After soft-shutdown has
Table 4. Fault Protection and Shutdown Setting Truth Table (continued)
General Shutdown
and Fault
Conditions
CC
), the controller sets its overvoltage fault latch,
VTT Overvoltage and Undervoltage Protection
OVP
SMPS Undervoltage Protection (UVP)
SMPS Overvoltage Protection (OVP)
CC
______________________________________________________________________________________
Thermal fault
below 1V or toggle SHDN to clear
falling edge
rising edge
rising edge
V
V
V
CC
MODE
CC
CC
UVLO
POR
POR
Complete DDR2 and DDR3 Memory
CC
DL and DH immediately pulled low.
PGOOD1 and PGOOD2 immediately forced low.
VTT and VTTR blocks immediately disabled (high impedance, no
16
Activate INT_REF once V
Once REFOK is valid (high), initiate the soft-start sequence.
DL remains low until switching/soft-start begins.
DL forced low.
DL = Don’t care. V
MOSFETs.
below 1V or toggle
discharge on outputs).
Power-Management Solution
CC
REACTION/DRIVER STATE
less than 2VT is not sufficient to turn on the
CC
rises above UVLO, and SHDN = high.
completed, the MAX17000 forces DL and DH low, and
enables the internal 16Ω discharge MOSFETs on CSL
and VTT. Cycle V
the undervoltage fault latch and restart the controller.
The MAX17000 features a thermal-fault protection cir-
cuit. When the junction temperature rises above
+160°C, a thermal sensor activates the fault latch, pulls
PGOOD1 and PGOOD2 low, and shuts down using the
shutdown sequence. Toggle SHDN or cycle V
below V
junction temperature cools by 15°C.
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency and
inductor operating point (ripple-current ratio). The pri-
mary design trade-off lies in choosing a good switching
frequency and inductor operating point, and the follow-
ing four factors dictate the rest of the design:
Input Voltage Range: The maximum value
(V
supply voltage allowed by the notebook’s AC
adapter voltage. The minimum value (V
must account for the lowest input voltage after
drops due to connectors, fuses, and battery selec-
tor switches. If there is a choice at all, lower input
voltages result in better efficiency.
Maximum Load Current: There are two values to
consider. The peak load current (I
mines the instantaneous component stresses and
filtering requirements, and thus drives output
capacitor selection, inductor saturation rating, and
the design of the current-limit circuit. The continu-
ous load current (I
IN(MAX)
CC
POR to reactivate the controller after the
) must accommodate the worst-case input
CC
below 1V or toggle SHDN to clear
LOAD
Design Procedure
Thermal-Fault Protection
) determines the thermal
Active-fault condition.
LOAD(MAX)
COMMENT
CC
IN(MIN)
) deter-
power
23
)

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